公开(公告)号：US10925152B2

公开(公告)日：2021-02-16

申请号：US16146168

申请日：2018-09-28

申请人： Intel Corporation

发明人： Albert Sutono ,  Xiaoning Ye ,  Jimmy Hsu ,  Daniel Hull

IPC分类号： H05K1/02 ,  H05K3/34 ,  H01L23/00 ,  H01L23/538 ,  H01L23/498 ,  H05K3/28

摘要： Apparatuses, systems and methods associated with dielectric coatings for printed circuit boards are disclosed herein. In embodiments, a printed circuit board (PCB) includes a substrate, microstrip conductors located on a surface of the substrate, a solder mask covering the surface of the substrate and the microstrip conductors, and a dielectric coating located on the solder mask, the dielectric coating on an opposite side of the solder mask from the microstrip conductors, wherein a thickness of the dielectric coating is selected to cause a ratio of capacitive coupling to self capacitance to be approximately equal to a ratio of inductive coupling to self inductance for each microstrip conductor of the microstrip conductors, where the thickness may be determined based on a specific methodology including simulations. Other embodiments may be described and/or claimed.

公开(公告)号：US20190045623A1

公开(公告)日：2019-02-07

申请号：US16146168

申请日：2018-09-28

申请人： Intel Corporation

发明人： Albert Sutono ,  Xiaoning Ye ,  Jimmy Hsu ,  Daniel Hull

IPC分类号： H05K1/02 ,  H05K3/34 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538

摘要： Apparatuses, systems and methods associated with dielectric coatings for printed circuit boards are disclosed herein. In embodiments, a printed circuit board (PCB) includes a substrate, microstrip conductors located on a surface of the substrate, a solder mask covering the surface of the substrate and the microstrip conductors, and a dielectric coating located on the solder mask, the dielectric coating on an opposite side of the solder mask from the microstrip conductors, wherein a thickness of the dielectric coating is selected to cause a ratio of capacitive coupling to self capacitance to be approximately equal to a ratio of inductive coupling to self inductance for each microstrip conductor of the microstrip conductors, where the thickness may be determined based on a specific methodology including simulations. Other embodiments may be described and/or claimed.

公开(公告)号：US10827627B2

公开(公告)日：2020-11-03

申请号：US16360216

申请日：2019-03-21

申请人： Intel Corporation

发明人： Xiaoning Ye ,  Jimmy Hsu

IPC分类号： H05K1/03 ,  H05K3/46 ,  H05K3/34 ,  H05K3/38 ,  H05K1/09 ,  H05K3/00 ,  H05K1/02

摘要： A printed circuit board, according one embodiment, includes a reference layer; a dielectric layer disposed on the reference layer; and a conductor layer adhered to the dielectric layer with an adhesive layer disposed between the dielectric layer and the conductor layer. The conductor layer has a smooth surface facing the dielectric layer having a roughness (Rz) of less than two microns.

公开(公告)号：US20190223299A1

公开(公告)日：2019-07-18

申请号：US16360216

申请日：2019-03-21

申请人： Intel Corporation

发明人： Xiaoning Ye ,  Jimmy Hsu

IPC分类号： H05K3/46 ,  H05K3/34 ,  H05K3/00 ,  H05K1/09 ,  H05K1/03 ,  H05K3/38

摘要： A printed circuit board, according one embodiment, includes a reference layer; a dielectric layer disposed on the reference layer; and a conductor layer adhered to the dielectric layer with an adhesive layer disposed between the dielectric layer and the conductor layer. The conductor layer has a smooth surface facing the dielectric layer having a roughness (Rz) of less than two microns.

公开(公告)号：US09131603B2

公开(公告)日：2015-09-08

申请号：US13844761

申请日：2013-03-15

申请人： INTEL CORPORATION

发明人： Kai Xiao ,  Jimmy Hsu ,  Yuan-Liang Li ,  Richard K. Kunze

IPC分类号： H05K1/02 ,  H01P3/08 ,  H01P11/00

CPC分类号： H05K1/0228 ,  H01P3/08 ,  H01P11/00 ,  H05K1/0245 ,  H05K1/0298 ,  H05K2201/09236 ,  H05K2201/09709 ,  Y10T29/49155

摘要： A signal line design is described herein. A circuit board may include a first signal line and a second signal line. The first signal line includes a pair of signal lines at a first depth of a section of a circuit board, wherein a centerline extends lengthwise between the pair of signal lines. The second signal line is disposed at a second depth of the circuit board. The second signal line includes a first segment that runs parallel to the first signal line at a first displacement from the center line. The second signal line includes a second segment that runs parallel to the first signal line on the other side of the center line at a second displacement distance from the center line.

摘要翻译： 这里描述了信号线设计。 电路板可以包括第一信号线和第二信号线。 第一信号线包括在电路板的一部分的第一深度处的一对信号线，其中中心线在该对信号线之间纵向延伸。 第二信号线设置在电路板的第二深度处。 第二信号线包括第一段，该第一段在与中心线的第一位移处平行于第一信号线延伸。 第二信号线包括与中心线的另一侧平行于第一信号线的第二段，距中心线的第二位移距离。