Abstract:
There is provided a method of manufacturing a semiconductor device. In the method, a gate insulation layer including a high-k dielectric material is formed on a substrate. An etch stop layer is formed on the gate insulation layer. A metal layer is formed on the etch stop layer. A hard mask including amorphous silicon is formed on the metal layer. The metal layer is patterned using the hard mask as an etching mask to form a metal layer pattern.
Abstract:
A method of forming agate structure having an improved electric characteristic is disclosed. A gate insulating layer is formed on a substrate and a metal layer is formed on the gate insulating layer. Then, an amorphous silicon layer is formed on the metal layer by a physical vapor deposition (PVD) process. An impurity doped polysilicon layer is formed on the amorphous silicon layer. Formation of an oxide layer at an interface between the amorphous silicon layer and the metal layer may be prevented.
Abstract:
Methods of manufacturing a semiconductor device include forming a gate insulation layer including a high-k dielectric material on a substrate that is divided into a first region and a second region; forming a diffusion barrier layer including a first metal on a second portion of the gate insulation layer in the second region; forming a diffusion layer on the gate insulation layer and the diffusion barrier layer; and diffusing an element of the diffusion layer into a first portion of the gate insulation layer in the first region.
Abstract:
In a method of forming a gate structure, a gate pattern including a gate insulation layer pattern and a gate electrode sequentially stacked on a substrate is formed. The gate electrode includes a metal. A first plasma process is performed on the gate pattern using a reaction gas to reduce an oxidized edge portion of the gate electrode. The reaction gas includes nitrogen. A spacer is formed on a sidewall of the gate pattern. A threshold voltage is adjusted by reducing the oxidized edge portion of the gate electrode. Therefore, a semiconductor device including the gate pattern has excellent electrical characteristics.
Abstract:
An insulation layer is formed on a substrate having an NMOS region and a PMOS region defined therein. A first conductive layer is formed on the insulation layer in the PMOS region, leaving a portion of the insulation layer in the NMOS region exposed. Nitriding is performed to produce a first nitrogen concentration in the insulation layer in the NMOS region and a second nitrogen concentration less than the first nitrogen concentration in the insulation layer in the PMOS region. A second conductive layer is formed on the insulation layer and the first conductive layer and the first and second conductive layers and the insulation layer are patterned to form a first gate structure and a second gate structure in the NMOS region and the PMOS region, respectively.
Abstract:
There is provided a method of manufacturing a semiconductor device. In the method, a gate insulation layer including a high-k dielectric material is formed on a substrate. An etch stop layer is formed on the gate insulation layer. A metal layer is formed on the etch stop layer. A hard mask including amorphous silicon is formed on the metal layer. The metal layer is patterned using the hard mask as an etching mask to form a metal layer pattern.
Abstract:
A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
Abstract:
A method of forming agate structure having an improved electric characteristic is disclosed. A gate insulating layer is formed on a substrate and a metal layer is formed on the gate insulating layer. Then, an amorphous silicon layer is formed on the metal layer by a physical vapor deposition (PVD) process. An impurity doped polysilicon layer is formed on the amorphous silicon layer. Formation of an oxide layer at an interface between the amorphous silicon layer and the metal layer may be prevented.
Abstract:
A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
Abstract:
Provided are a method of forming a dielectric and a method of fabricating a semiconductor device. The method includes forming a preliminary dielectric including Hf, O and an “A” element on an underlying layer. The preliminary dielectric is formed in an amorphous structure or a mixed structure of an amorphous structure and an “M” crystalline structure. The “A” element about 1 at % to about 5 at % of the total content of the “A” element and Hf in the preliminary dielectric. Through a nitridation process, nitrogen is added to the preliminary dielectric. The nitrogen-containing dielectric is changed into a dielectric having a “T” crystalline structure through a phase transition process, wherein the “T” crystalline structure is different from the “M” crystalline structure. An upper layer is formed on the “T” crystalline dielectric.