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1.
公开(公告)号:US20240274688A1
公开(公告)日:2024-08-15
申请号:US18603994
申请日:2024-03-13
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Zhili ZHANG , Jin RAO , Tao LIU , Haijun LI , Shuiming LI , Ming LU
IPC: H01L29/45 , H01L21/285 , H01L21/768 , H01L23/00 , H01L23/367 , H01L23/373 , H01L23/48 , H01L29/20 , H01L29/40 , H01L29/417 , H01L29/66 , H01L29/778 , H03F3/213
CPC classification number: H01L29/452 , H01L21/28575 , H01L21/76898 , H01L23/3675 , H01L23/3735 , H01L23/481 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L29/2003 , H01L29/401 , H01L29/402 , H01L29/41758 , H01L29/66462 , H01L29/7786 , H01L2224/32225 , H01L2224/45144 , H01L2224/48175 , H01L2224/73265 , H01L2924/1033 , H01L2924/13064 , H01L2924/1421 , H03F3/213
Abstract: The present disclosure relates to semiconductor devices, manufacturing methods, a power amplification circuits, and electronic devices. One example semiconductor device includes a substrate, a channel layer and a barrier layer sequentially disposed on the substrate in a stacked manner, a source, a gate, and a drain disposed on the barrier layer, a backside via through a region from the substrate to the barrier layer below the source, and a backside conductive layer covering the backside via and a back surface of the substrate, where the source is in contact with and connected to the backside conductive layer.
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公开(公告)号:US20230299022A1
公开(公告)日:2023-09-21
申请号:US18324071
申请日:2023-05-25
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Cen TANG , Jin RAO , Tao LIU , Haijun LI , Wei LU , Lingcong LE , Juncai MA , Zhili ZHANG
CPC classification number: H01L23/66 , H01L29/0649 , H01L29/401 , H01L29/402
Abstract: A semiconductor device includes a substrate, a gate, a second dielectric layer, and a field plate. The substrate has a first dielectric layer, and a thickness of the first dielectric layer in a first area is greater than a thickness of the first dielectric layer in a second area outside the first area. The gate is located on the substrate and in the first area, the gate includes a first gate structure and a second gate structure, and the second gate structure is formed on a side of the first dielectric layer that is away from the substrate and covers a part of the first dielectric layer. The second dielectric layer covers the gate and the first dielectric layer. The field plate is located on the second dielectric layer and is disposed in both the first area and the second area.
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公开(公告)号:US20130314157A1
公开(公告)日:2013-11-28
申请号:US13900319
申请日:2013-05-22
Applicant: Huawei Technologies Co., Ltd.
Inventor: Jin RAO , Quan LIU , Yun ZHU , Huajiang WANG
IPC: H03G3/00
CPC classification number: H03G3/004 , H03G1/0029
Abstract: The embodiments of the present invention disclose a variable gain amplifier and relate to the field of electronic circuits. The linear-in-dB relationship between an output current and a control voltage of the variable gain amplifier is relatively ideal. The variable gain amplifier includes a fitted differential module group and an offset voltage output module, where the fitted differential module group is configured to output, under the control of a driving voltage and offset voltages, an output current of the variable gain amplifier according to a reference current; and the fitted differential module group includes n fitted differential modules, the n fitted differential modules are cascaded in turn, and n is any positive integer larger than 1.
Abstract translation: 本发明的实施例公开了一种可变增益放大器,涉及电子电路领域。 输出电流与可变增益放大器的控制电压之间的线性dB关系是比较理想的。 可变增益放大器包括一个拟合的差分模块组和一个失调电压输出模块,其中所配置的差分模块组被配置为在驱动电压和偏移电压的控制下输出可变增益放大器的输出电流, 参考电流; 安装的差分模块组包括n个差分模块,n个拟合的差分模块依次级联,n为大于1的任何正整数。
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公开(公告)号:US20230395455A1
公开(公告)日:2023-12-07
申请号:US18454876
申请日:2023-08-24
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Shuiming LI , Yu WANG , Ping MA , Ming LU , Cen TANG , Zhili ZHANG , Qiang HE , Haijun LI , Tao LIU , Jin RAO
IPC: H01L23/367 , H01L23/373 , H01L29/66 , H01L29/778
CPC classification number: H01L23/367 , H01L23/3735 , H01L23/3736 , H01L29/66462 , H01L29/7786
Abstract: Embodiments of this application provide a semiconductor device, an electronic device, and a semiconductor device preparation method, and relate to the field of chip manufacturing and packaging technologies, to improve heat dissipation efficiency of the semiconductor device without increasing a size. The semiconductor device includes: a substrate, a source, a drain, a gate, and a groove. The source, the drain, and the gate are all formed on the substrate, and an active region is formed between the source and the drain on the substrate. The groove is disposed in the substrate, and a spacing is formed between the groove and the active region. A heat dissipation layer is formed in the groove, and a coefficient of thermal conductivity of the heat dissipation layer is greater than that of the substrate.
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5.
公开(公告)号:US20230343835A1
公开(公告)日:2023-10-26
申请号:US18334541
申请日:2023-06-14
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Zhili ZHANG , Jin RAO , Tao LIU , Haijun LI , Wei LU , Shuiming LI , Cen TANG , Qiang HE , Juncai MA , Chunhua FAN , Yangyi ZHU
IPC: H01L29/40 , H01L29/20 , H01L29/778 , H01L29/66
CPC classification number: H01L29/402 , H01L29/2003 , H01L29/7786 , H01L29/401 , H01L29/66462
Abstract: The technology of this application relates to a high electron mobility transistor including a GaN substrate layer, a barrier layer, a circuit layer, and a field plate that are sequentially stacked. The GaN substrate layer includes a main body layer and a channel layer that are stacked, the channel layer is adjacent to the barrier layer, the circuit layer includes a source, a drain, and a dielectric layer, the dielectric layer is disposed between the source and the drain, the field plate is disposed on a side that is of the dielectric layer and that is away from the barrier layer, an orthographic projection of the field plate on the channel layer is a field plate projection, the channel layer includes a modulation region and a non-modulation region, the non-modulation region surrounds the modulation region, the modulation region and the field plate projection at least partially overlap.
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公开(公告)号:US20140191803A1
公开(公告)日:2014-07-10
申请号:US14141128
申请日:2013-12-26
Applicant: Huawei Technologies Co., Ltd.
Inventor: Zhi ZHANG , Xinrong HU , Jin RAO , Yongli WANG , Xiaosheng ZHU , Rong PENG
IPC: H03G3/30
CPC classification number: H03G1/0023 , H03G3/3036
Abstract: A continuous variable gain amplifier includes an attenuator network, a boost network, a first amplifying network, and a second amplifying network, where the attenuator network generates first differential output signals according to an input signal and sends the first differential output signals to the first amplifying network and the second amplifying network; the first amplifying network and the second amplifying network receive one output of the first differential output signals each, and generate a first final output signal and a second final output signal respectively according to an externally input control voltage; and the boost network receives the first final output signal and the second final output signal, generates second differential output signals, and sends a first output and a second output of the second differential output signals to the first amplifying network and the second amplifying network, respectively
Abstract translation: 连续可变增益放大器包括衰减器网络,升压网络,第一放大网络和第二放大网络,其中衰减器网络根据输入信号产生第一差分输出信号,并将第一差分输出信号发送到第一放大网络 网络和第二放大网络; 第一放大网络和第二放大网络分别接收第一差分输出信号的一个输出,并根据外部输入的控制电压产生第一最终输出信号和第二最终输出信号; 并且升压网络接收第一最终输出信号和第二最终输出信号,产生第二差分输出信号,并且将第二差分输出信号的第一输出和第二输出分别发送到第一放大网络和第二放大网络
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