知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

15 records (took 0.017 seconds)

    Photodiode array
    2.
    发明授权
    Photodiode array 有权

    公开(公告)号：US10050069B2

    公开(公告)日：2018-08-14

    申请号：US15293784

    申请日：2016-10-14

    Applicant: HAMAMATSU PHOTONICS K.K.

    Inventor： Kazuhisa Yamamura ,  Kenichi Sato

    IPC: H01L31/107 ,  H01L27/144 ,  H01L27/14 ,  H01L27/146

    CPC classification number: H01L27/1446 ,  H01L27/14 ,  H01L27/14603 ,  H01L27/14605 ,  H01L27/14636 ,  H01L31/107

    Abstract: A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected being incident to the photodetector channels. The array comprises: a p−-type semiconductor layer on the n-type semiconductor layer of the substrate; resistors is provided to each of the photodetector channels and is connected to a signal conductor at one end thereof; and an n-type separating part between the plurality of photodetector channels. The p−-type semiconductor layer forms a pn junction at the interface between the substrate, and comprises a plurality of multiplication regions for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.

    Photodiode and photodiode array
    6.
    发明授权
    Photodiode and photodiode array 有权
    光电二极管和光电二极管阵列

    公开(公告)号：US08994135B2

    公开(公告)日：2015-03-31

    申请号：US14138950

    申请日：2013-12-23

    Applicant: Hamamatsu Photonics K.K.

    Inventor： Kazuhisa Yamamura ,  Akira Sakamoto ,  Terumasa Nagano ,  Yoshitaka Ishikawa ,  Satoshi Kawai

    IPC: H01L31/0232 ,  H01L27/146 ,  H01L31/0236 ,  H01L31/0352 ,  H01L31/103 ,  H01L31/107

    CPC classification number: H01L27/1464 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/0232 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/103 ,  H01L31/107 ,  H01L2224/48091 ,  Y02E10/50 ,  H01L2924/00014

    Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p− type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p− type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.

    Abstract translation: 光电二极管阵列PDA1设置有基板S，其中多个受光通道CH具有n型半导体层32.光电二极管阵列PDA1设置有形成在n型半导体层32上的p型半导体层33，电阻 设置在相应的光检测通道CH上，每个具有连接到信号导线23的一个端部，以及形成在多个光电检测通道CH之间的n型分离部分40。 p型半导体层33在与n型半导体层32的界面处形成pn结，并且具有多个乘法区域AM，用于对应于各个受光通道而与检测目标光入射产生的载流子的雪崩乘法。 在n型半导体层32的表面上形成不规则的凹凸10，并且该表面被光学曝光。

    Semiconductor light-detecting element
    10.
    发明授权
    Semiconductor light-detecting element 有权
    半导体光检测元件

    公开(公告)号：US09419159B2

    公开(公告)日：2016-08-16

    申请号：US14073249

    申请日：2013-11-06

    Applicant: Hamamatsu Photonics K.K.

    Inventor： Akira Sakamoto ,  Takashi Iida ,  Koei Yamamoto ,  Kazuhisa Yamamura ,  Terumasa Nagano

    IPC: H01L31/0236 ,  H01L27/144 ,  H01L31/0352 ,  H01L31/18

    CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    Abstract: Prepared is an n− type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n− type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n− type semiconductor substrate 1 is formed on the second principal surface 1b side of the n− type semiconductor substrate 1. After formation of the accumulation layer 11, the n− type semiconductor substrate 1 is subjected to a thermal treatment.

    Abstract translation: 制备的n型半导体衬底1具有彼此相对的第一主表面1a和第二主表面1b，并且具有形成在第一主表面1a侧上的p +型半导体区域3。 在n型半导体衬底1的第二主表面1b中至少与p +型半导体区域3相对的区域用脉冲激光束照射以形成不规则凹凸。在形成不规则凹凸10之后，积累 在n型半导体衬底1的第二主表面1b侧上形成杂质浓度高于n型半导体衬底1的层11。在形成蓄积层11之后，n型半导体衬底1 进行热处理。

Patent Agency Ranking