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公开(公告)号：US08204467B2
公开(公告)日：2012-06-19
申请号：US12368785
申请日：2009-02-10
申请人： Fredrik Tillman , Fenghao Mu
发明人： Fredrik Tillman , Fenghao Mu
IPC分类号： H04B1/26
CPC分类号： H04B1/30 , H03D7/18 , H03D2200/0086
摘要： The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.
摘要翻译： 通过调整混频器核心的差分输出阻抗或调制器的输入阻抗，通过补偿失配或负载来减少源自器件之间不平衡的差分无源混频器核心的二阶互调失真 滤波器耦合到无源混频器的输出。 补偿不平衡允许更大的抑制差分结构中的偶次谐波，这减少了混频器输出端的二阶互调。 补偿通过可调电阻元件实现，该电阻元件由内置的自检架构校准。 在接收机操作期间，校准电路被禁用。
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公开(公告)号：US20100203860A1
公开(公告)日：2010-08-12
申请号：US12368785
申请日：2009-02-10
申请人： Fredrik Tillman , Fenghao Mu
发明人： Fredrik Tillman , Fenghao Mu
IPC分类号： H04B1/16
CPC分类号： H04B1/30 , H03D7/18 , H03D2200/0086
摘要： The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.
摘要翻译： 通过调整混频器核心的差分输出阻抗或调制器的输入阻抗，通过补偿失配或负载来减少源自器件之间不平衡的差分无源混频器核心的二阶互调失真 滤波器耦合到无源混频器的输出。 补偿不平衡允许更大的抑制差分结构中的偶次谐波，这减少了混频器输出端的二阶互调。 补偿通过可调电阻元件实现，该电阻元件由内置的自检架构校准。 在接收机操作期间，校准电路被禁用。
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公开(公告)号：US20090270062A1
公开(公告)日：2009-10-29
申请号：US12108239
申请日：2008-04-23
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
CPC分类号： H03D7/166 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/163 , H03D7/165 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088 , H03D2200/009
摘要： According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors.
摘要翻译： 根据一个实施例，射频接收机包括用于将射频信号转换成基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生第一组时钟信号和第二组时钟信号。 第一组时钟信号的频率是第二组时钟信号的两倍。 第一组时钟信号被布置成驱动混频器输入开关晶体管，并且第二组时钟信号被布置成驱动输出开关晶体管。
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公开(公告)号：US09735734B2
公开(公告)日：2017-08-15
申请号：US12243232
申请日：2008-10-01
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/165 , H03D2200/0023 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088
摘要： A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.
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公开(公告)号：US20090268849A1
公开(公告)日：2009-10-29
申请号：US12108252
申请日：2008-04-23
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
IPC分类号： H04L27/22
CPC分类号： H03D7/163 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/165 , H03D7/166 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088 , H03D2200/009
摘要： According to one embodiment, a radio frequency receiver comprises a quadrature mixer configured to convert radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer comprises an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer comprises a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a plurality of quadrature pulsed clock signals and delayed versions of the quadrature pulsed clock signals. The quadrature pulsed clock signals and the delayed versions of the quadrature pulsed clock signals drive the mixer input switch transistors and the output switch transistors.
摘要翻译： 根据一个实施例，射频接收机包括被配置为将射频信号转换为基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生正交脉冲时钟信号的多个正交脉冲时钟信号和延迟版本。 正交脉冲时钟信号和正交脉冲时钟信号的延迟版本驱动混频器输入开关晶体管和输出开关晶体管。
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公开(公告)号：US08099070B2
公开(公告)日：2012-01-17
申请号：US12108239
申请日：2008-04-23
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
IPC分类号： H04B1/16
CPC分类号： H03D7/166 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/163 , H03D7/165 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088 , H03D2200/009
摘要： According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors.
摘要翻译： 根据一个实施例，射频接收机包括用于将射频信号转换成基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生第一组时钟信号和第二组时钟信号。 第一组时钟信号的频率是第二组时钟信号的两倍。 第一组时钟信号被布置成驱动混频器输入开关晶体管，并且第二组时钟信号被布置成驱动输出开关晶体管。
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公开(公告)号：US20100081408A1
公开(公告)日：2010-04-01
申请号：US12243232
申请日：2008-10-01
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
IPC分类号： H04B1/26
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/165 , H03D2200/0023 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088
摘要： A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.
摘要翻译： 这里描述了可配置的无源混频器。 根据一个示例性实施例，无源混频器包括时钟发生器，控制器和并联连接的多个无源混频器核心。 时钟发生器包括用于每个无源混频器核心的本地振荡器驱动单元。 控制器通过分别配置每个无源混频器内核来实现/禁用每个无源混频器内核，从而改变无源混频器的有效晶体管尺寸。 例如，控制器可以选择性地使一个或多个无源混频器内核改变无源混频器的有效晶体管宽度。 随着性能要求和/或操作通信标准的改变，控制器可以重新配置每个无源混频器核心。
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公开(公告)号：US08665000B2
公开(公告)日：2014-03-04
申请号：US13576827
申请日：2011-02-14
IPC分类号： G06G7/12
CPC分类号： H03D7/165 , H03D7/18 , H03D2200/0086
摘要： A method of frequency down-converting an input signal to an output signal, a first local oscillator signal is generated as a square wave having a duty cycle of 1/3 or 2/3, and the input signal is mixed with first oscillator signal to achieve a first down-converted signal, a second local oscillator signal is generated as a modified square wave having the same period time as the first oscillator signal and a duty cycle of 2/3, of which one part has a positive amplitude and another part has a negative amplitude. The input signal is mixed with the second oscillator signal to achieve a second down-converted signal. The first oscillator signal has a delay of 1/4 of the period time to achieve a phase shift of π/2 between the oscillator signals, and at least one down-converted signal is multiplied by a pre-calculated factor. The resulting down-converted signals are added to achieve the output signal.
摘要翻译： 将输入信号下变频为输出信号的方法，产生第一本地振荡器信号作为占空比为1/3或2/3的方波，并将输入信号与第一振荡器信号混合 实现第一下变频信号，产生第二本地振荡器信号作为具有与第一振荡器信号相同周期时间的修正方波，并且产生其中一部分具有正振幅的占空比2/3，另一部分 具有负幅度。 输入信号与第二振荡器信号混合以实现第二下变频信号。 第一振荡器信号具有周期时间的1/4的延迟以实现振荡器信号之间的π/ 2的相移，并且至少一个下变频信号乘以预先计算的因子。 所产生的下变频信号被加入以实现输出信号。
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公开(公告)号：US09300395B2
公开(公告)日：2016-03-29
申请号：US13542359
申请日：2012-07-05
CPC分类号： H04B7/2643 , H04L5/001 , H04L5/0094 , H04L5/1469 , Y02D70/1262 , Y02D70/1264 , Y02D70/449
摘要： The teachings herein provide a number of advantages, including but not limited to improving soft-cell operation in service scenarios involving legacy devices that do not directly support carrier aggregation—i.e., devices that can transmit or receive in only one frequency band at a time. By imposing a Time Division Duplex (TDD) arrangement across two carriers operating in different frequency bands, scheduled transmissions involving the legacy device are mutually exclusive as between the two carriers. Advantageously, the TDD arrangement is imposed across first and second carriers used in the macro- and low-power layers of a soft-cell, thus imposing TDD-based coordination of scheduled transmissions between those carriers irrespective of whether the individual carriers are configured as Frequency Division Duplex (FDD) or TDD carriers, or a mix thereof.
摘要翻译： 本文的教导提供了许多优点，包括但不限于在不直接支持载波聚合的传统设备（即，一次只能在一个频带中发送或接收的设备）的业务场景中改进软小区操作。 通过对在不同频带中工作的两个载波进行时分双工（TDD）布置，涉及传统设备的调度传输在两个载波之间是相互排斥的。 有利地，TDD布置被施加在在软小区的宏功率层和低功率层中使用的第一和第二载波上，从而在这些载波之间强加基于TDD的协调调度的传输，而不管各个载波是否被配置为频率 分割双工（FDD）或TDD载波，或其混合。
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10.发明授权公开(公告)号：US08804581B2
公开(公告)日：2014-08-12
申请号：US13264262
申请日：2010-04-08
IPC分类号： H04J1/00
CPC分类号： H04W72/085 , H04W88/08 , Y02D70/1222 , Y02D70/1242 , Y02D70/1262
摘要： The present invention relates to scheduling of uplink and downlink resources between mobile terminals (110, 120) and a base station (130). To reduce the power leakage between the transmitter and the receiver of the mobile terminal (110), the scheduler allocates uplink frequency carriers and downlink frequency carriers with a large duplex distance to those mobile terminals (110, 120) that have to transmit with high power. This means that the requirements on the external SAW filter could be reduced.
摘要翻译： 本发明涉及移动终端（110,120）和基站（130）之间的上行链路和下行链路资源的调度。 为了减少移动终端（110）的发射机和接收机之间的功率泄漏，调度器向那些必须以高功率传输的移动终端（110,120）分配具有大双工距离的上行链路频率载波和下行链路频率载波 。 这意味着可以减少对外部SAW滤波器的要求。
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