公开(公告)号：US08204467B2

公开(公告)日：2012-06-19

申请号：US12368785

申请日：2009-02-10

申请人： Fredrik Tillman ,  Fenghao Mu

发明人： Fredrik Tillman ,  Fenghao Mu

IPC分类号： H04B1/26

CPC分类号： H04B1/30 ,  H03D7/18 ,  H03D2200/0086

摘要： The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.

摘要翻译： 通过调整混频器核心的差分输出阻抗或调制器的输入阻抗，通过补偿失配或负载来减少源自器件之间不平衡的差分无源混频器核心的二阶互调失真 滤波器耦合到无源混频器的输出。 补偿不平衡允许更大的抑制差分结构中的偶次谐波，这减少了混频器输出端的二阶互调。 补偿通过可调电阻元件实现，该电阻元件由内置的自检架构校准。 在接收机操作期间，校准电路被禁用。

公开(公告)号：US20090268849A1

公开(公告)日：2009-10-29

申请号：US12108252

申请日：2008-04-23

申请人： Fenghao Mu ,  Fredrik Tillman

发明人： Fenghao Mu ,  Fredrik Tillman

IPC分类号： H04L27/22

CPC分类号： H03D7/163 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D7/166 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088 ,  H03D2200/009

摘要： According to one embodiment, a radio frequency receiver comprises a quadrature mixer configured to convert radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer comprises an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer comprises a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a plurality of quadrature pulsed clock signals and delayed versions of the quadrature pulsed clock signals. The quadrature pulsed clock signals and the delayed versions of the quadrature pulsed clock signals drive the mixer input switch transistors and the output switch transistors.

摘要翻译： 根据一个实施例，射频接收机包括被配置为将射频信号转换为基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生正交脉冲时钟信号的多个正交脉冲时钟信号和延迟版本。 正交脉冲时钟信号和正交脉冲时钟信号的延迟版本驱动混频器输入开关晶体管和输出开关晶体管。

公开(公告)号：US20100203860A1

公开(公告)日：2010-08-12

申请号：US12368785

申请日：2009-02-10

申请人： Fredrik Tillman ,  Fenghao Mu

发明人： Fredrik Tillman ,  Fenghao Mu

IPC分类号： H04B1/16

CPC分类号： H04B1/30 ,  H03D7/18 ,  H03D2200/0086

摘要： The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.

摘要翻译： 通过调整混频器核心的差分输出阻抗或调制器的输入阻抗，通过补偿失配或负载来减少源自器件之间不平衡的差分无源混频器核心的二阶互调失真 滤波器耦合到无源混频器的输出。 补偿不平衡允许更大的抑制差分结构中的偶次谐波，这减少了混频器输出端的二阶互调。 补偿通过可调电阻元件实现，该电阻元件由内置的自检架构校准。 在接收机操作期间，校准电路被禁用。

公开(公告)号：US20090270062A1

公开(公告)日：2009-10-29

申请号：US12108239

申请日：2008-04-23

申请人： Fenghao Mu ,  Fredrik Tillman

发明人： Fenghao Mu ,  Fredrik Tillman

IPC分类号： H04B1/26 ,  H03B21/00

CPC分类号： H03D7/166 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/163 ,  H03D7/165 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088 ,  H03D2200/009

摘要： According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors.

摘要翻译： 根据一个实施例，射频接收机包括用于将射频信号转换成基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生第一组时钟信号和第二组时钟信号。 第一组时钟信号的频率是第二组时钟信号的两倍。 第一组时钟信号被布置成驱动混频器输入开关晶体管，并且第二组时钟信号被布置成驱动输出开关晶体管。

公开(公告)号：US09735734B2

公开(公告)日：2017-08-15

申请号：US12243232

申请日：2008-10-01

申请人： Fenghao Mu ,  Fredrik Tillman

发明人： Fenghao Mu ,  Fredrik Tillman

IPC分类号： H04B1/26 ,  H03D7/14 ,  H03D7/16

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088

摘要： A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.

公开(公告)号：US08099070B2

公开(公告)日：2012-01-17

申请号：US12108239

申请日：2008-04-23

申请人： Fenghao Mu ,  Fredrik Tillman

发明人： Fenghao Mu ,  Fredrik Tillman

IPC分类号： H04B1/16

CPC分类号： H03D7/166 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/163 ,  H03D7/165 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088 ,  H03D2200/009

摘要： According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors.

摘要翻译： 根据一个实施例，射频接收机包括用于将射频信号转换成基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生第一组时钟信号和第二组时钟信号。 第一组时钟信号的频率是第二组时钟信号的两倍。 第一组时钟信号被布置成驱动混频器输入开关晶体管，并且第二组时钟信号被布置成驱动输出开关晶体管。

公开(公告)号：US20100081408A1

公开(公告)日：2010-04-01

申请号：US12243232

申请日：2008-10-01

申请人： Fenghao Mu ,  Fredrik Tillman

发明人： Fenghao Mu ,  Fredrik Tillman

IPC分类号： H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088

摘要： A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.

摘要翻译： 这里描述了可配置的无源混频器。 根据一个示例性实施例，无源混频器包括时钟发生器，控制器和并联连接的多个无源混频器核心。 时钟发生器包括用于每个无源混频器核心的本地振荡器驱动单元。 控制器通过分别配置每个无源混频器内核来实现/禁用每个无源混频器内核，从而改变无源混频器的有效晶体管尺寸。 例如，控制器可以选择性地使一个或多个无源混频器内核改变无源混频器的有效晶体管宽度。 随着性能要求和/或操作通信标准的改变，控制器可以重新配置每个无源混频器核心。

公开(公告)号：US08681894B2

公开(公告)日：2014-03-25

申请号：US12611677

申请日：2009-11-03

申请人： Fenghao Mu ,  Sven Mattisson

发明人： Fenghao Mu ,  Sven Mattisson

IPC分类号： H04L27/00

CPC分类号： H03F3/24 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/336

摘要： A digital affine transformation modulator and power amplifier drives a transmitter antenna. The modulator performs an affine transformation on a signal, wherein the I, Q space is mapped to a plurality of sectors. A signal in a sector is expressed as the sum of two vectors, the angles of which define the sector boundaries. A digital power amplifier comprises a plurality of amplifier cells, each cell comprising at least two amplifier units. For a given signal, each amplifier unit selectively amplifies a clock signal having a phase corresponding to one of the boundary angles of the signal's affine transformed sector. A subset of the plurality of amplifier cells receiving each phase clock signal are enabled, based on the magnitude of the associated vector describing the signal in affine transform space. The modulation scheme exhibits higher efficiency than quadrature modulation, without the bandwidth expansion and group delay mismatch of polar modulation.

摘要翻译： 数字仿射变换调制器和功率放大器驱动发射机天线。 调制器对信号执行仿射变换，其中I，Q空间映射到多个扇区。 扇区中的信号被表示为两个矢量的和，它们的角度限定了扇区边界。 数字功率放大器包括多个放大器单元，每个单元包括至少两个放大器单元。 对于给定信号，每个放大器单元选择性地放大具有对应于信号仿射变换扇区的一个边界角的相位的时钟信号。 基于描述仿射变换空间中的信号的相关矢量的大小，启用接收每个相位时钟信号的多个放大器单元的子集。 调制方案表现出比正交调制更高的效率，没有频带扩展和极化调制的群延迟失配。

公开(公告)号：US20140051441A1

公开(公告)日：2014-02-20

申请号：US13983566

申请日：2012-01-25

申请人： Leif Wilhelmsson ,  Lars Sundstrom ,  Fenghao Mu

发明人： Leif Wilhelmsson ,  Lars Sundstrom ,  Fenghao Mu

IPC分类号： H04W36/30 ,  H04B17/00

CPC分类号： H04W36/30 ,  H03D7/18 ,  H03D2200/0045 ,  H04B17/327 ,  H04B17/336

摘要： The disclosure relates to a Complex Intermediate Frequency (CIF)-based receiver adapted to process a received signal comprising a signal component at a desired frequency and a signal component as an image frequency. The CIF-based receiver determines the power of the received signal by calibrating the receiver to minimize the power of the signal component at the image frequency that interferes with the signal component at the desired frequency, introduces signal leakage from the image frequency to intentionally degrade the quality of the signal component at the desired frequency, and determines the power of the signal component at the image frequency based on the amount of degradation.

摘要翻译： 本公开涉及一种适用于处理包含期望频率的信号分量和信号分量的接收信号作为图像频率的基于复数中频（CIF）的接收机。 基于CIF的接收机通过校准接收机来确定接收信号的功率，以使图像频率处的信号分量的功率最小化，以在期望的频率处干扰信号分量，引入来自图像频率的信号泄漏以故意降级 以期望频率的信号分量的质量，并且基于退化量确定图像频率处的信号分量的功率。

公开(公告)号：US20130281043A1

公开(公告)日：2013-10-24

申请号：US13992804

申请日：2011-12-09

申请人： Fenghao Mu

发明人： Fenghao Mu

IPC分类号： H03F3/193

CPC分类号： H03F3/193 ,  H03F1/223 ,  H03F1/347 ,  H03F3/45179 ,  H03F2200/06 ,  H03F2200/09 ,  H03F2200/294 ,  H03F2200/541 ,  H03F2203/45386 ,  H03F2203/45394 ,  H03F2203/45516 ,  H03F2203/45522 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45554 ,  H03F2203/45591 ,  H03F2203/45621 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03F2203/45662 ,  H03F2203/45731

摘要： A low noise amplifier comprises at least one amplifying transistor (Ts1; Ts2) configured in a common source configuration to receive an input signal (RFin) at a gate terminal and provide an amplified signal at a drain terminal and at least one feedback path arranged to couple a part of the amplified signal back to the gate terminal and comprising a feedback impedance. The low noise amplifier further comprises a self-coupled step-up transformer having at least one primary winding (Lp) connected to a supply voltage (Vdd) and the drain terminal of the at least one amplifying transistor and at least one self-coupled secondary inductor winding (Lf1; Lf2) arranged in the feedback path. The low noise amplifier provides a better suppression for out-band interference and at the same time it has a wider input match bandwidth, decent conversion gain and decent noise figure without increasing power consumption.

摘要翻译： 低噪声放大器包括至少一个配置在公共源配置中的放大晶体管（Ts1; Ts2），用于在栅极端接收输入信号（RFin），并在漏极端提供放大信号，并将至少一个反馈通路布置成 将放大的信号的一部分耦合回到栅极端并包括反馈阻抗。 低噪声放大器还包括自耦合升压变压器，其具有连接到电源电压（Vdd）的至少一个初级绕组（Lp）和至少一个放大晶体管的漏极端子以及至少一个自耦合次级 电感绕组（Lf1; Lf2）布置在反馈路径中。 低噪声放大器为带外干扰提供更好的抑制，同时具有更宽的输入匹配带宽，良好的转换增益和体面的噪声系数，而不增加功耗。