Demodulator
    1.
    发明授权
    Demodulator 失效
    解压器

    公开(公告)号:US3927378A

    公开(公告)日:1975-12-16

    申请号:US38736373

    申请日:1973-08-10

    CPC classification number: H03K9/02 H03D1/22

    Abstract: A demodulator for the demodulation of sampled signals which resulted from the periodically varying sampling of an analog signal comprises a summing circuit, a feedback circuit and a lowpass filter. The input of the demodulator is connected to one input of the summing circuit, the low-pass filter is connected between the output of the summing circuit and the output of the demodulator and the feedback circuit is connected between the low-pass filter and the input of the summing circuit. Samples corresponding to excluded samples in the sampling patterns of the signals fed to the demodulator as compared with sampling patterns of uniformly occurring sampled signals are transferred to the summing circuit via the feedback circuit.

    Abstract translation: 用于解调由模拟信号的周期性变化的采样产生的采样信号的解调器包括加法电路,反馈电路和低通滤波器。 解调器的输入连接到求和电路的一个输入端,低通滤波器连接在求和电路的输出端和解调器的输出端之间,反馈电路连接在低通滤波器和输入端 的求和电路。 与均匀发生的采样信号的采样模式相比,馈送到解调器的信号的采样模式中的排除样本的样本经由反馈电路传送到求和电路。

    Filter with a periodic transfer characteristic
    3.
    发明授权
    Filter with a periodic transfer characteristic 失效
    具有周期性传输特性的滤波器

    公开(公告)号:US3613030A

    公开(公告)日:1971-10-12

    申请号:US3613030D

    申请日:1970-02-24

    CPC classification number: H03H17/04

    Abstract: A filter with a periodic frequency characteristic for filtering sampled signals comprises two addition circuits and p delay circuits serially between the two addition circuits. Each addition circuit is so constructed that at the outlet side there is obtained the sum of the input signals multiplied by factors associated with the input terminals of the circuit. The delay of each of the delay circuits is equal to the sampling period T of the sampled signals. The outlets of the delay circuits are connectable, via contacts, to the inlet of the addition circuit at the inlet side of the filter. These contacts are closed during a number of K sampling periods and then open during p sampling periods.

    Filters utilizing ladder networks
    8.
    发明授权
    Filters utilizing ladder networks 失效
    过滤器使用梯形网络

    公开(公告)号:US3559113A

    公开(公告)日:1971-01-26

    申请号:US3559113D

    申请日:1968-09-23

    CPC classification number: H03H11/1213 H03H11/26 H03H11/265

    Abstract: A FILTER COMPRISES A PLURALITY OF CAPACITORS CONNECTED IN SERIES BETWEEN A SIGNAL SOURCE AND THE INPUT OF AN AMPLIFIER. A PLURALITY OF RESISTORS EACH HAVING ONE TERMINAL CONNECTED TO A DIFFERENT JUNCTION OF ADJACENT CAPACITORS, AND TO THE JUNCTION OF AN END CAPACITOR AND THE INPUT OF THE AMPLIFIER. THE OTHER ENDS OF ALTERNATE RESISTORS INCLUDING THE RESISTOR CONNECTED TO THE AMPLIFIER JUNCTION RECEIVE SIGNALS RELATED TO THE SIGNAL SOURCE, AND THE OTHER END OF EACH OF THE REMAINING RESISTORS IS CONNECTED TO THE OUTPUT OF THE AMPLIFIER.

    Periodic frequency characteristic filter for filtering periodic sampled signal
    9.
    发明授权
    Periodic frequency characteristic filter for filtering periodic sampled signal 失效
    周期性频率特征滤波器,用于过滤采样周期性采样信号

    公开(公告)号:US3622916A

    公开(公告)日:1971-11-23

    申请号:US3622916D

    申请日:1970-02-24

    CPC classification number: H03H17/04

    Abstract: A filter has first and second multiinput addition circuits each with a single output wherein one input of the first addition is the input to the filter and the output of the second addition circuit is the output of the filter. The addition circuits are so constructed that the signal received at any input is multiplied by a weighting factor. The output of the first addition circuit is connected to one input of the second addition circuit. A plurality of serially connected delay circuits are also connected between the outlet of the first addition circuit and the inputs of the second addition circuit with the outputs of the delay circuits being connected to respective inputs of the second addition circuit and also to respective inputs of the first addition circuit. The delay of the delay circuits is equal to 1/N times the sampling period, where N is an integer greater than unity so that different transfer functions of the filter can be obtained.

    Filter arrangement
    10.
    发明授权

    公开(公告)号:US3581246A

    公开(公告)日:1971-05-25

    申请号:US3581246D

    申请日:1967-11-07

    CPC classification number: H01P1/215 H01P1/209 H03H7/0115 H03H7/09

    Abstract: There is disclosed a filter comprising a power dividing circuit means including an input port adapted to receive signals, an output port adapted to transmit signals and two signal-transfer ports. Signals received by the input port are power divided and fed to the signal-transfer ports for transmission therefrom to a reactive circuit means which reflects the signals back to the signal-transfer ports. The reflected signals received by the signal-transfer ports pass through the power dividing circuit means to the output port and are geometrically added. Various power dividing circuit means including differential transformers, magic T devices and 90* hybrid devices are disclosed. The reactive circuit means include, reciprocal and nonreciprocal phase shifters as well as waveguide elements having irises and tuning stubs.

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