SEMICONDUCTOR DEVICE
    2.
    发明申请

    公开(公告)号:US20190006501A1

    公开(公告)日:2019-01-03

    申请号:US16023889

    申请日:2018-06-29

    IPC分类号: H01L29/778 H01L29/20

    摘要: A semiconductor device, including: a channel layer formed on a substrate; a top barrier layer formed on the channel layer, wherein a first heterojunction is formed between the channel layer and the top barrier layer so that a first two-dimensional electron gas is generated in the channel layer; a buffer structure formed between the substrate and the channel layer; a back barrier layer formed between the buffer structure and the channel layer, wherein a second heterojunction is formed between the buffer structure and the back barrier layer so that a second two-dimensional electron gas is generated in the buffer structure; and a source electrode, a drain electrode, and a gate electrode formed on the top barrier layer, respectively; wherein a sheet carrier density of the second two-dimensional electron gas is less than 8E+10 cm−2.

    Semiconductor power device
    3.
    发明授权

    公开(公告)号:US11094814B2

    公开(公告)日:2021-08-17

    申请号:US15720564

    申请日:2017-09-29

    摘要: A semiconductor power device includes a substrate, a buffer structure formed on the substrate, a barrier structure formed on the buffer structure, a channel layer formed on the barrier structure, and a barrier layer formed on the channel layer. The barrier structure includes a first functional layer on the buffer structure, a first back-barrier layer on the first functional layer, and an interlayer between the first back-barrier layer and the first functional layer. A material of the first back-barrier layer comprises Alx1Ga1-x1N, a material of the first functional layer comprises Alx2Ga1-x2N, 0

    Heterostructure field-effect transistor
    5.
    发明授权
    Heterostructure field-effect transistor 有权
    异质结场场效应晶体管

    公开(公告)号:US09577048B1

    公开(公告)日:2017-02-21

    申请号:US14864680

    申请日:2015-09-24

    摘要: Heterostructure field-effect transistor (HFET) having a channel layer, a barrier layer disposed on the channel layer, and a gate, source and drain electrodes disposed on the barrier layer, respectively, and corresponding fabrication methods are disclosed. The drain electrode includes a p-type semiconductor patterned structure and a raised drain section, the drain electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface together with a side surface of p-type semiconductor patterned structure and a bottom surface together with a side surface of raised drain section, the ohmic contact is formed between another surface of raised drain section and barrier layer, the raised drain section partially surrounding the p-type semiconductor patterned structure, and a bandgap of the channel layer is less than a bandgap of the barrier layer.

    摘要翻译: 公开了具有通道层的异质结构场效应晶体管(HFET),设置在沟道层上的势垒层以及设置在阻挡层上的栅极,源极和漏极以及相应的制造方法。 漏电极包括p型半导体图案化结构和升高的漏极部分,漏电极包括肖特基接触和欧姆接触,肖特基接触形成在与p型半导体图案化结构的侧表面一起的顶表面 以及底部表面与凸起的排出部分的侧表面一起形成,欧姆接触形成在升高的排水部分的另一个表面和阻挡层之间,部分围绕p型半导体图案化结构的升高的漏极部分和通道的带隙 层小于阻挡层的带隙。

    Semiconductor power device
    7.
    发明授权

    公开(公告)号:US10290730B1

    公开(公告)日:2019-05-14

    申请号:US15951184

    申请日:2018-04-12

    摘要: A semiconductor power device includes an engineered aluminum-nitride substrate structure, and method of fabricating the same are described. The engineered substrate structure is effectively integrated with a transition layer of AlN/AlGaN disposed thereon, a buffer layer disposed on the transition layer having a C—(Al)GaN/u-GaN multiple stacking layered structure, a channel layer, a barrier layer, and an optional SiNx interlayer together, to form a GaN-based semiconductor power device. The GaN buffer layer is capable of achieving sufficient thickness for higher performance. The engineered substrate structure has a core region made of an aluminum nitride (AlN) substrate, a single crystal silicon layer as top material layer thereof, and bonded together with an encapsulated multi-layered structure containing adhesive layers, thin film layers and the AlN substrate. Higher breakdown voltage and improved overall device quality with respect to epitaxy-induced bow, warp, and cracking issues are achieved by the semiconductor power device.

    Semiconductor device
    8.
    发明授权

    公开(公告)号:US10396191B2

    公开(公告)日:2019-08-27

    申请号:US16023889

    申请日:2018-06-29

    摘要: A semiconductor device, including: a channel layer formed on a substrate; a top barrier layer formed on the channel layer, wherein a first heterojunction is formed between the channel layer and the top barrier layer so that a first two-dimensional electron gas is generated in the channel layer; a buffer structure formed between the substrate and the channel layer; a back barrier layer formed between the buffer structure and the channel layer, wherein a second heterojunction is formed between the buffer structure and the back barrier layer so that a second two-dimensional electron gas is generated in the buffer structure; and a source electrode, a drain electrode, and a gate electrode formed on the top barrier layer, respectively; wherein a sheet carrier density of the second two-dimensional electron gas is less than 8E+10 cm−2.

    Heterostructure device
    9.
    发明授权

    公开(公告)号:US10204998B2

    公开(公告)日:2019-02-12

    申请号:US15397747

    申请日:2017-01-04

    摘要: A heterostructure device includes a channel layer, a barrier layer disposed on the channel layer, and a first electrode and a second electrode disposed on the barrier layer, respectively. The second electrode includes a p-type semiconductor structure and a raised section disposed on the p-type semiconductor structure, the second electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface of the p-type semiconductor structure and a first bottom surface of the raised section, the ohmic contact is formed between a second bottom surface of the raised section and the barrier layer.