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公开(公告)号:US12068410B2
公开(公告)日:2024-08-20
申请号:US17387433
申请日:2021-07-28
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Shang-Ju Tu , Tsung-Cheng Chang , Chia-Cheng Liu
IPC分类号: H01L29/78 , H01L29/778 , B82Y99/00 , H01L21/02 , H01L29/20 , H01L29/207
CPC分类号: H01L29/78 , H01L29/7783 , B82Y99/00 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L29/2003 , H01L29/207
摘要: A semiconductor power device includes a substrate; a buffer structure formed on the substrate; a barrier structure formed on the buffer structure; a channel layer formed on the barrier structure; and a barrier layer formed on the channel layer; wherein the barrier structure includes a first functional layer on the buffer structure, a second functional layer formed between the first functional layer and the buffer structure, a first back-barrier layer on the first functional layer, and an interlayer between the first back-barrier layer and the first functional layer; wherein a material of the first back-barrier layer includes Alx1Ga1-x1N, a material of the first functional layer includes Alx2Ga1-x2N, a material of the interlayer includes Alx3Ga1-x3N, a material of the second functional layer includes Alx4Ga1-x4N, wherein 0
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公开(公告)号:US20190006501A1
公开(公告)日:2019-01-03
申请号:US16023889
申请日:2018-06-29
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Chia-Cheng Lui , Shang-Ju Tu
IPC分类号: H01L29/778 , H01L29/20
CPC分类号: H01L29/7783 , H01L29/2003 , H01L29/207
摘要: A semiconductor device, including: a channel layer formed on a substrate; a top barrier layer formed on the channel layer, wherein a first heterojunction is formed between the channel layer and the top barrier layer so that a first two-dimensional electron gas is generated in the channel layer; a buffer structure formed between the substrate and the channel layer; a back barrier layer formed between the buffer structure and the channel layer, wherein a second heterojunction is formed between the buffer structure and the back barrier layer so that a second two-dimensional electron gas is generated in the buffer structure; and a source electrode, a drain electrode, and a gate electrode formed on the top barrier layer, respectively; wherein a sheet carrier density of the second two-dimensional electron gas is less than 8E+10 cm−2.
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公开(公告)号:US11094814B2
公开(公告)日:2021-08-17
申请号:US15720564
申请日:2017-09-29
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Shang-Ju Tu , Tsung-Cheng Chang , Chia-Cheng Liu
IPC分类号: H01L29/78 , H01L29/778 , B82Y99/00 , H01L29/20 , H01L21/02 , H01L29/207
摘要: A semiconductor power device includes a substrate, a buffer structure formed on the substrate, a barrier structure formed on the buffer structure, a channel layer formed on the barrier structure, and a barrier layer formed on the channel layer. The barrier structure includes a first functional layer on the buffer structure, a first back-barrier layer on the first functional layer, and an interlayer between the first back-barrier layer and the first functional layer. A material of the first back-barrier layer comprises Alx1Ga1-x1N, a material of the first functional layer comprises Alx2Ga1-x2N, 0
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公开(公告)号:US09711683B2
公开(公告)日:2017-07-18
申请号:US14498104
申请日:2014-09-26
发明人: Heng-Kuang Lin , Ya-Yu Yang
IPC分类号: H01L33/12 , H01L21/02 , H01L29/20 , H01L33/32 , H01L21/265 , H01L29/812
CPC分类号: H01L33/12 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/26506 , H01L29/2003 , H01L29/812 , H01L33/32
摘要: The present application discloses a semiconductor device comprising a crystalline substrate having a first region and a second region, a nuclei structure on the first region, a first crystalline buffer layer on the nuclei structure, a void between the second region and the first crystalline buffer layer, a second crystalline buffer layer on the first crystalline buffer layer, an intermediate layer located between the first crystalline buffer layer and the second crystalline buffer layer, and a semiconductor device layer on the second crystalline buffer layer.
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公开(公告)号:US09577048B1
公开(公告)日:2017-02-21
申请号:US14864680
申请日:2015-09-24
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Ping-Hao Lin
IPC分类号: H01L21/00 , H01L29/205 , H01L29/778 , H01L29/417 , H01L29/66 , H01L21/31 , H01L21/02 , H01L21/283 , H01L21/308 , H01L29/20 , H01L21/311 , H01L21/306
CPC分类号: H01L29/475 , H01L21/283 , H01L21/28581 , H01L21/28593 , H01L21/30612 , H01L29/0619 , H01L29/2003 , H01L29/205 , H01L29/41725 , H01L29/41758 , H01L29/66462 , H01L29/7786
摘要: Heterostructure field-effect transistor (HFET) having a channel layer, a barrier layer disposed on the channel layer, and a gate, source and drain electrodes disposed on the barrier layer, respectively, and corresponding fabrication methods are disclosed. The drain electrode includes a p-type semiconductor patterned structure and a raised drain section, the drain electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface together with a side surface of p-type semiconductor patterned structure and a bottom surface together with a side surface of raised drain section, the ohmic contact is formed between another surface of raised drain section and barrier layer, the raised drain section partially surrounding the p-type semiconductor patterned structure, and a bandgap of the channel layer is less than a bandgap of the barrier layer.
摘要翻译: 公开了具有通道层的异质结构场效应晶体管(HFET),设置在沟道层上的势垒层以及设置在阻挡层上的栅极,源极和漏极以及相应的制造方法。 漏电极包括p型半导体图案化结构和升高的漏极部分,漏电极包括肖特基接触和欧姆接触,肖特基接触形成在与p型半导体图案化结构的侧表面一起的顶表面 以及底部表面与凸起的排出部分的侧表面一起形成,欧姆接触形成在升高的排水部分的另一个表面和阻挡层之间,部分围绕p型半导体图案化结构的升高的漏极部分和通道的带隙 层小于阻挡层的带隙。
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公开(公告)号:US11049961B2
公开(公告)日:2021-06-29
申请号:US16453118
申请日:2019-06-26
申请人: EPISTAR CORPORATION
发明人: Shang-Ju Tu , Chia-Cheng Liu , Tsung-Cheng Chang , Ya-Yu Yang , Yu-Jiun Shen , Jen-Inn Chyi
IPC分类号: H01L29/778 , H01L29/417 , H01L29/66
摘要: A high electron mobility transistor, includes a substrate; a channel layer formed on the substrate; a barrier layer formed on the channel layer; a source electrode and a drain electrode formed on the barrier layer; a depletion layer formed on the barrier layer and between the source electrode and the drain electrode, wherein a material of the depletion layer comprises boron nitride or zinc oxide; and a gate electrode formed on the depletion layer.
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公开(公告)号:US10290730B1
公开(公告)日:2019-05-14
申请号:US15951184
申请日:2018-04-12
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Yu-Jiun Shen , Chia-Cheng Liu
IPC分类号: H01L21/02 , H01L29/778 , H01L29/205 , H01L29/20 , H01L29/66
摘要: A semiconductor power device includes an engineered aluminum-nitride substrate structure, and method of fabricating the same are described. The engineered substrate structure is effectively integrated with a transition layer of AlN/AlGaN disposed thereon, a buffer layer disposed on the transition layer having a C—(Al)GaN/u-GaN multiple stacking layered structure, a channel layer, a barrier layer, and an optional SiNx interlayer together, to form a GaN-based semiconductor power device. The GaN buffer layer is capable of achieving sufficient thickness for higher performance. The engineered substrate structure has a core region made of an aluminum nitride (AlN) substrate, a single crystal silicon layer as top material layer thereof, and bonded together with an encapsulated multi-layered structure containing adhesive layers, thin film layers and the AlN substrate. Higher breakdown voltage and improved overall device quality with respect to epitaxy-induced bow, warp, and cracking issues are achieved by the semiconductor power device.
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公开(公告)号:US10396191B2
公开(公告)日:2019-08-27
申请号:US16023889
申请日:2018-06-29
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Chia-Cheng Lui , Shang-Ju Tu
IPC分类号: H01L29/20 , H01L29/207 , H01L29/778
摘要: A semiconductor device, including: a channel layer formed on a substrate; a top barrier layer formed on the channel layer, wherein a first heterojunction is formed between the channel layer and the top barrier layer so that a first two-dimensional electron gas is generated in the channel layer; a buffer structure formed between the substrate and the channel layer; a back barrier layer formed between the buffer structure and the channel layer, wherein a second heterojunction is formed between the buffer structure and the back barrier layer so that a second two-dimensional electron gas is generated in the buffer structure; and a source electrode, a drain electrode, and a gate electrode formed on the top barrier layer, respectively; wherein a sheet carrier density of the second two-dimensional electron gas is less than 8E+10 cm−2.
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公开(公告)号:US10204998B2
公开(公告)日:2019-02-12
申请号:US15397747
申请日:2017-01-04
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Ping-Hao Lin
IPC分类号: H01L21/00 , H01L29/47 , H01L29/66 , H01L21/283 , H01L29/20 , H01L21/306 , H01L29/417 , H01L29/778 , H01L29/06 , H01L21/285 , H01L29/205
摘要: A heterostructure device includes a channel layer, a barrier layer disposed on the channel layer, and a first electrode and a second electrode disposed on the barrier layer, respectively. The second electrode includes a p-type semiconductor structure and a raised section disposed on the p-type semiconductor structure, the second electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface of the p-type semiconductor structure and a first bottom surface of the raised section, the ohmic contact is formed between a second bottom surface of the raised section and the barrier layer.
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公开(公告)号:US20170117376A1
公开(公告)日:2017-04-27
申请号:US15397747
申请日:2017-01-04
申请人: EPISTAR CORPORATION
发明人: Ya-Yu Yang , Ping-Hao Lin
IPC分类号: H01L29/47 , H01L21/285 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/417
CPC分类号: H01L29/475 , H01L21/283 , H01L21/28581 , H01L21/28593 , H01L21/30612 , H01L29/0619 , H01L29/2003 , H01L29/205 , H01L29/41725 , H01L29/41758 , H01L29/66462 , H01L29/7786
摘要: A heterostructure device includes a channel layer, a barrier layer disposed on the channel layer, and a first electrode and a second electrode disposed on the barrier layer, respectively. The second electrode includes a p-type semiconductor structure and a raised section disposed on the p-type semiconductor structure, the second electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface of the p-type semiconductor structure and a first bottom surface of the raised section, the ohmic contact is formed between a second bottom surface of the raised section and the barrier layer.
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