POWER ELECTRONIC CIRCUIT AND POWER MODULE
    3.
    发明申请
    POWER ELECTRONIC CIRCUIT AND POWER MODULE 有权
    电力电子电路和电源模块

    公开(公告)号:US20150180351A1

    公开(公告)日:2015-06-25

    申请号:US14581096

    申请日:2014-12-23

    CPC classification number: H02M1/44 H02M3/00

    Abstract: Disclosed herein is a power electronic circuit having a reference ground and a differential mode loop unit. The differential mode loop unit has a capacitance component, a switch and an electronic component, wherein the capacitance component has a first end, the switch has a first end connecting in series with the capacitance component, the electronic component has a first end, the electronic component connects in series with the capacitance component and the switch, the capacitance component and switch are packaged in a power module, the power module has a trace and at least one output pin connected to reference ground, wherein the first end of the switch or the first end of the electronic component is only connected to the first end of the capacitance component through the trace, and the first end of the capacitance component is connected to reference ground through the output pin.

    Abstract translation: 这里公开了具有参考地和差模回路单元的电力电子电路。 差分模式环路单元具有电容部件,开关和电子部件,其中电容部件具有第一端,开关具有与电容部件串联连接的第一端,电子部件具有第一端,电子部件 组件与电容部件和开关串联连接,电容部件和开关被封装在电源模块中,电源模块具有一个跟踪和至少一个连接到参考接地的输出引脚,其中开关的第一端或 电子部件的第一端仅通过迹线连接到电容部件的第一端,并且电容部件的第一端通过输出引脚连接到参考接地。

    POWER PACKAGE MODULE OF MULTIPLE POWER CHIPS AND METHOD OF MANUFACTURING POWER CHIP UNIT

    公开(公告)号:US20190287943A1

    公开(公告)日:2019-09-19

    申请号:US16428231

    申请日:2019-05-31

    Abstract: The embodiments of the present disclosure relate to a power package module of multiple power chips and a method of manufacturing a power chip unit. The power package module of multiple power chips includes: a power chip unit including at least two power chips placed in parallel and a bonding part bonding the two power chips; and a substrate supporting the power chip unit and including a metal layer electronically connecting with the power chip unit, wherein the bonding part is made from an insulated material with cohesiveness, the distance of a gap between the two power chips placed in parallel is smaller than or equal to a preset width, and the bonding part is filled in the gap, insulatedly bonding the two power chips placed in parallel, and wherein side surfaces of the two power chips are naked except the portions contacting the bonding part.

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