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    Channel predictive behavior and fault analysis
    2.
    发明授权
    Channel predictive behavior and fault analysis 有权

    公开(公告)号：US11606152B2

    公开(公告)日：2023-03-14

    申请号：US17342316

    申请日：2021-06-08

    Applicant: Cisco Technology, Inc.

    Inventor： Amendra Koul ,  David Nozadze ,  Mike Sapozhnikov ,  Joel Goergen ,  Arnav Shailesh Shah

    IPC: H04B17/15 ,  H04B17/24 ,  H04B10/071

    Abstract: Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.

    High speed traceless interconnect
    3.
    发明授权
    High speed traceless interconnect 有权

    公开(公告)号：US11482802B2

    公开(公告)日：2022-10-25

    申请号：US17333925

    申请日：2021-05-28

    Applicant: Cisco Technology, Inc.

    Inventor： Jason Visneski ,  George Edward Curtis ,  Mike Sapozhnikov ,  Peter Gunadisastra ,  Joel Goergen

    IPC: H05K1/11 ,  H05K3/34 ,  H01R12/53 ,  H05K1/18

    Abstract: An apparatus includes a printed circuit board (PCB). The PCB includes a plurality of through-holes extending through the PCB between a PCB first surface and a PCB second surface that opposes the PCB first surface, where each through-hole includes a via extending from the PCB first surface to a depth within the through-hole that is distanced from the PCB second surface. An integrated circuit surface mount is connected at the PCB first surface with vias of the through-holes, and a cable interconnect assembly is surface mount connected at the PCB second surface. The cable interconnect assembly includes a plurality of contact pins, each contact pin extending within a corresponding through-hole and having a sufficient dimension to engage and electrically connect with the via of the corresponding through-hole so as to facilitate exchange of an electrical signal between the integrated circuit and the cable interconnect assembly.

    FIBER WEAVE SKEW ASSESSMENT FOR PRINTED CIRCUIT BOARDS
    5.
    发明申请
    FIBER WEAVE SKEW ASSESSMENT FOR PRINTED CIRCUIT BOARDS 审中-公开

    公开(公告)号：US20190219385A1

    公开(公告)日：2019-07-18

    申请号：US15872163

    申请日：2018-01-16

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： Amendra Koul ,  Yaochao Yang ,  Mike Sapozhnikov ,  Joel Richard Goergen ,  Kartheek Nalla

    IPC: G01B11/24 ,  G01N21/956

    Abstract: In one embodiment, a method generally comprises importing a layout identifying routing information for a plurality of differential pair traces on a printed circuit board at a skew assessment module, receiving values for a plurality of skew parameters associated with fiber weave skew, receiving variation parameters from a database comprising data collected on fiber weave variation for one or more of the skew parameters, calculating a skew estimate for the printed circuit board based on the skew parameters and the variation parameters at the skew assessment module, and determining if the skew estimate is within a specified skew allowance for the printed circuit board.

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