摘要:
A frequency synthesizer circuit comprises a controller, a synthesizer and a voltage controlled oscillator are used to generate an oscillating signal in response to external commands. The synthesizer provides a lock detect signal to the controller when the synthesizer detects that the oscillating signal has reached a desired frequency following application of a load signal. A first timer, a second timer, and a counter are adapted to receive the load signal and the lock detect signal. The first timer provides a first measurement corresponding to an amount of time between the load signal and a first receipt of the lock detect signal. The second timer provides a second measurement corresponding to an amount of time between the load signal and a final receipt of the lock detect signal. The counter provides a count value corresponding to a total number of times that the lock detect signal is received inclusive of the first receipt and the final receipt of the lock detect signal. A memory device is coupled to each of the first timer, second timer, and counter, which has a data storage portion for storing the first measurement, second measurement and count value.
摘要:
A receiver is provided for use in an environment in which both frequency-hopping and direct-sequence spread spectrum radio frequency (RF) signals are present. The receiver includes a receive section adapted to receive and downconvert RF input signals. A detector is coupled to the receive section, and has a plurality of parallel filter stages with each tuned for a distinct frequency band. A discriminator compares the RF energy level passing through each of the filter stages to determine whether the RF input signals are frequency-hopping or direct-sequence spread spectrum signals. A controller is adapted to control the receive section in response to the discriminator.
摘要:
A radio receiver discriminates between narrowband and wideband radio frequency (RF) signals on the basis of the rate of increase of the integrated energy level of the received signal. The receiver comprises a receive section adapted to receive and downconvert RF input signals to intermediate frequency (IF) signals, and a received signal strength indicator coupled to the receive section and providing a receiver energy signal corresponding to the energy of the IF signals. A discrimination section receives the energy signal, and determines whether the RF input signals are narrowband or wideband by detecting the rate of increase of the integrated level of the receiver energy signal. The discrimination section further comprises a first threshold detector providing a first triggering signal upon the integrated level of the receiver energy signal reaching a first level, a second threshold detector providing a second triggering signal upon the integrated level of the receiver energy signal reaching a second level, and a timer providing a timing signal corresponding to elapsed time between the first and second triggering signal. The RF input signals comprise wideband signals when the timing signal is less than a predetermined value, and narrowband signals when the timing signal is at least equal to the predetermined value.
摘要:
A digital matched filter for a CDMA radio comprises a digital delay line having a plurality of successive delay stages adapted to receive a digital signal and propagate the digital signal therethrough at a fixed rate. A correlator is coupled to the digital delay line to correlate the digital signal to a predefined spreading code to provide a correlation signal representing a degree of correlation of the digital signal to the spreading code. A window logic unit is coupled to the correlator to enable operation of the correlator only during successive discrete time periods of the correlation signal corresponding to a high degree of correlation of the digital signal to the spreading code.
摘要:
A radio frequency (RF) transceiver adaptively maintains power output level linearity across a broad spectrum of transmitting frequencies. The RF transceiver comprises a frequency synthesizer adapted to modulate an information signal across a plurality of distinct channels and an amplifier adapted to amplify the modulated information signal to a desired power level for transmission as an RF signal. The transceiver includes a table of offset values having individual entries corresponding to each of the distinct channels. A portion of the amplified and modulated information signal is sampled to provide binary values corresponding to instantaneous power levels of the transceiver. The offset values are calculated by comparing the sampled binary values to optimal binary values. Thereafter, an amount of amplification provided by the amplifier for an associated one of the channels is controlled in accordance with a corresponding one of the offset values from the table.
摘要:
A radio receiver for direct sequence spread spectrum radio frequency (RF) signals is provided which discontinues radio reception when it is recognized that a received signal is intended for another such receiver. As a result, the receiving apparatus draws substantially less electrical current than conventional spread spectrum receivers. The apparatus provides for demodulation of an RF signal to recover digital information in the form of a transmitted message packet having a header portion and a data portion. The apparatus determines a message address and data length from the header portion. If the determined address does not correspond to the distinct apparatus address of the particular receiver, the apparatus disables the signal demodulation operation for a discrete period of time corresponding to the determined data length.
摘要:
A switched gain antenna array comprising a plurality of dipole elements disposed in series with a phasing stub coupled between adjacent ones of the dipole elements. An antenna feed line is coupled to a first one of the dipole elements to couple the RF signals into and out of the plurality of dipole elements. The phasing stubs are adapted to adjust phase of the RF signals provided to each of the dipole elements so that the dipole elements operate in phase. A switch is disposed between the first one of the dipole elements and a second one of the dipole elements. The switch is adapted to disconnect the first one of the dipole elements from remaining ones of the dipole elements during transmit operations of the antenna array and to connect each of the dipole elements together during receive operations of the antenna array. As a result, the antenna array has greater gain during receive operations than during transmit operations.
摘要:
A spread spectrum communication system is provided in which a receiver is adapted to despread multi-bit digital signals transmitted with a fixed chipping rate using two or more different spreading code lengths. As a result, a longer spreading code could be utilized to transmit at a lower data rate for conditions in which jamming resistance is more critical, such as over longer distances, and a shorter spreading code could be utilized to transmit at a higher data rate for conditions in which jamming resistance is less critical, such as over shorter distances. The receiver further comprises a digital matched filter adapted to correlate to the two different spreading codes. The digital matched filter comprises a digital delay line having a plurality of successive delay stages that propagate the received digital signal therethrough at a fixed rate corresponding to the chipping rate of the digital signal. A first correlator compares the digital signal to a first spreading code having a length M, and a second correlator compares the digital signal to a second spreading code having a length N, in which N is less than M. A multiplexer is adapted to select an output from one of the two correlators.
摘要:
A wireless local area network (WLAN) provides optimal data throughput by operating at multiple data rates simultaneously. The WLAN includes a network master communicating with a plurality of remote client transceiver nodes. The network master maintains a table of active client transceiver nodes. The table includes a current data rate for each of the active client transceiver nodes. Periodic high-speed and low-speed beacon signals are transmitted from the network master to the active client transceiver nodes. Each of the active client transceiver nodes receives and processes the beacon signals to determine an optimal data rate. Then, each of the active client transceiver nodes transmits a return signal to the network master which designates the determined optimal data rate. Thereafter, the network master updates the table to reflect the optimal data rate for each of the active client transceiver nodes. Subsequent messages from the network master to the active client transceiver nodes are thereby transmitted at the current data rate for each respective one of the active client transceiver nodes.
摘要:
A delay diversity processor for use in receiving direct sequence spread spectrum data utilizes multipath signals to enhance bit synchronization performance by integrating the magnitude of each multipath signal to allow for erratic fluctuations in the multipath signal. As a result, the receiver is less prone to sudden signal strength variation that might trigger erroneous bit resynchronization. The delay diversity processor comprises a first circuit which determines a magnitude value for each of a plurality of correlated signal samples of individual data bits of plural data streams of the received spread spectrum data. A second circuit integrates each of the magnitude values over a period of time corresponding to receipt of a plurality of the individual data bits. The integrated magnitude values provide a measure of confidence of a particular one of the correlated signal samples with respect to remaining ones of the correlated signal samples. The correlated signal sample having the most consistently high measure of confidence is thus most likely to contain reliable and valid data. In an embodiment of the delay diversity processor, the digital delay circuit of the second circuit provides for resetting of the integrated magnitude values within following interruption of receipt of the spread spectrum data. The data values within the digital delay circuit can be reset either to zero, or to a predetermined value. The use of a predetermined value improves the ability of the delay diversity processor to generate valid data following an interruption of the spread spectrum data.