公开(公告)号：US20240340099A1

公开(公告)日：2024-10-10

申请号：US18617740

申请日：2024-03-27

Applicant: Nokia Solutions and Networks Oy

Inventor： Arne FISCHER-BUHNER

IPC: H04B17/391 ,  H04B1/04 ,  H04B17/13

CPC classification number: H04B17/3913 ,  H04B1/04 ,  H04B17/13 ,  H04B2001/0433

Abstract: Various example embodiments relate to mitigation of a non-linearity in a data communication chain. A method may include: obtaining a data communication signal including a plurality of complex-valued input samples; capturing, from the plurality of complex-valued input samples, a current sample and a set of delayed samples; generating a phase-normalized input signal based on normalizing phase of the current sample and the set of delayed samples by a normalization term, wherein the normalization term is common for the current sample and the set of delayed samples; providing the phase-normalized input signal to a neural network configured to mitigate non-linearity of a data communication chain and to output a complex-valued output sample for each of the plurality of complex-valued input samples; and denormalizing phase of the complex-valued output sample by a denormalization term configured to restore phase of the data communication signal.

公开(公告)号：US11984857B2

公开(公告)日：2024-05-14

申请号：US17144952

申请日：2021-01-08

Applicant: Skyworks Solutions, Inc.

Inventor： Leslie Paul Wallis

IPC: H03F1/22 ,  H03F1/34 ,  H03F1/56 ,  H03F3/195 ,  H03F3/213 ,  H03F3/24 ,  H03F3/72 ,  H04B1/04 ,  H04B1/16

CPC classification number: H03F1/565 ,  H03F1/22 ,  H03F1/223 ,  H03F1/34 ,  H03F1/342 ,  H03F1/347 ,  H03F3/195 ,  H03F3/213 ,  H03F3/245 ,  H03F3/72 ,  H04B1/0475 ,  H04B1/1607 ,  H03F2200/18 ,  H03F2200/294 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/75 ,  H04B2001/0433

Abstract: Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to linearize the amplifier.

公开(公告)号：US20240022272A1

公开(公告)日：2024-01-18

申请号：US18140617

申请日：2023-04-28

Applicant: Realtek Semiconductor Corp.

Inventor： Yuan-Shuo Chang ,  Tzu-Ming Kao

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H04B1/0458 ,  H04B2001/0433

Abstract: A method for calibrating compensation values utilized by a compensation device in a transmitter includes: obtaining a plurality of output signals sequentially generated by the transmitter by processing a pair of input signals based on a plurality of pairs of compensation values as a plurality of feedback signals, where each feedback signal corresponds to one of the plurality of pairs of compensation values; obtaining a signal component of the feedback signals at a predetermined frequency as a portion of the feedback signals; determining a pair of equivalent impairment parameters in a calibration operation according to the plurality of pairs of compensation values and the portion of the feedback signals; and determining a pair of calibrated compensation values according to the pair of equivalent impairment parameters and providing the pair of calibrated compensation values to the compensation device.

公开(公告)号：US20230308338A1

公开(公告)日：2023-09-28

申请号：US18205958

申请日：2023-06-05

Applicant: Space Exploration Technologies Corp.

Inventor： Martin S. McCormick ,  Feipeng Wang

IPC: H04L27/36 ,  H03F1/32 ,  H04B1/04

CPC classification number: H04L27/367 ,  H03F1/3247 ,  H04B1/04 ,  H04L27/368 ,  H03F1/3294 ,  H04B2001/0425 ,  H03F1/3258 ,  H03F2201/3233 ,  H04B2001/0433

Abstract: A wireless communications system includes a pre-distortion actuator configured to receive a carrier-modulated signal and convert the carrier-modulated signal into an output signal, the pre-distortion actuator comprising a behavioral model that models a transmit chain of the system including at least one amplifier and at least one antenna and predict an input-output relationship of the transmit chain of the system between an input to the transmit chain to an output of the transmit chain. The system includes a phased antenna array configured to transmit the output signal. The phased antenna array includes a plurality of antenna elements, each antenna element electrically coupled to a respective power amplifier. The pre-distortion actuator is configured to generate the output signal by applying a correction to the carrier-modulated input signal that cancels out nonlinearities The behavioral model is updated based on feedback from a receiver from a previous output signal transmitted to the receiver.

公开(公告)号：US20230268896A1

公开(公告)日：2023-08-24

申请号：US17725392

申请日：2022-04-20

Applicant: Samsung Display co,Ltd.

Inventor： Ali Fazli Yeknami ,  Anup P. Jose

IPC: H03F3/45 ,  H04B1/04

CPC classification number: H03F3/45179 ,  H03F3/45475 ,  H04B1/0458 ,  H04B2001/0433

Abstract: An analog front end (AFE) circuit including: a continuous time linear equalizer (CTLE) circuit; a transimpedance amplifier (TIA) connected to the CTLE circuit; and a feedback circuit including: a first transistor connected between a first output of the feedback circuit and a first node connected to a first current source; a second transistor connected between a second output of the feedback circuit and a second node connected to a second current source; and a first tunable resistor coupled between the first node and the second node, wherein: a first input of the feedback circuit is connected to a first output of the TIA; a second input of the feedback circuit is connected to a second output of the TIA; the second output of the feedback circuit is connected to a first input of the TIA.

公开(公告)号：US20230179155A1

公开(公告)日：2023-06-08

申请号：US17963474

申请日：2022-10-11

Applicant: Skyworks Solutions, Inc.

Inventor： Ziv Alon ,  Maxwell L. Thomas

IPC: H03F3/19 ,  H04B1/04 ,  H03F3/21 ,  H04W88/02 ,  H04B1/30 ,  H03F1/02 ,  H03F1/32 ,  H03F3/24

CPC classification number: H03F3/19 ,  H04B1/0475 ,  H03F3/21 ,  H04W88/02 ,  H04B1/30 ,  H03F1/0227 ,  H03F1/3247 ,  H03F3/245 ,  H03F2200/451 ,  H04B2001/0433 ,  H04B2001/0425 ,  H03F2201/3224

Abstract: A power amplifier system front end measures both forward and reverse power associated with an RF transmit signal. A processor is configured to use measurements derived from the measured forward and reverse power output to adjust the RF transmit signal in order to compensate for one or more memory effects of the power amplifier system.

公开(公告)号：US10367535B2

公开(公告)日：2019-07-30

申请号：US15844081

申请日：2017-12-15

Applicant: MOTOROLA SOLUTIONS, INC.

Inventor： Nir Corse ,  Mark Rozental ,  Yaniv Salem

IPC: H03F1/32 ,  H03G3/30 ,  H04B1/04

CPC classification number: H04B1/04 ,  H03F1/3223 ,  H03F1/3247 ,  H03F1/3294 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/336 ,  H03F2200/57 ,  H03G3/3042 ,  H04B2001/0416 ,  H04B2001/0433 ,  H04B2001/0441

Abstract: A Cartesian loop circuit includes a reference signal amplifier, a forward path coupled to the reference signal amplifier, a feedback path coupled to the forward path, and a controller. The forward path includes an up-mixer to up mix a forward path signal to a radio frequency signal. The feedback path includes a down-mixer to down mix a feedback signal to a frequency of a baseband reference signal inputted to the forward path. The feedback path provides the down-mixed feedback signal to the forward path. The controller is to perform power control at a low power by controlling a gain of the reference signal amplifier and is to perform power control at a high power by controlling a gain of the down-mixer. At the high power, the controller may perform power control by further controlling the gain of the up-mixer.

公开(公告)号：US20180367174A1

公开(公告)日：2018-12-20

申请号：US15991381

申请日：2018-05-29

Applicant: FUJITSU LIMITED

Inventor： Tomohiro Nakamura ,  TAKANORI IWAMATSU

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H04B1/0458 ,  H04B2001/0425 ,  H04B2001/0433 ,  H04B2001/045

Abstract: A distortion compensation apparatus includes: a filtering unit that is provided with a plurality of storing units each of which is capable of storing a signal therein and that filters an input signal by sequentially moving the input signal starting from a storing unit provided on a first stage up to another storing unit provided on a final stage; a calculating unit that calculates a power level of a signal output from a storing unit that is provided on an earlier stage than the storing unit provided on the final stage; an output unit that, on the basis of the power level calculated, outputs a distortion compensation coefficient used for cancelling out non-linear distortion occurring in an amplifier; and a distortion compensation unit that performs a distortion compensation process on a signal output from the storing unit provided on the final stage, by using the distortion compensation coefficient.

公开(公告)号：US20180019772A1

公开(公告)日：2018-01-18

申请号：US15634841

申请日：2017-06-27

Applicant: Skyworks Solutions, Inc.

Inventor： Matthew Lee Banowetz ,  Philip H. Thompson ,  Edward James Anthony ,  James Henry Ross

IPC: H04B1/04 ,  H03G3/00 ,  H03F3/00

CPC classification number: H04B1/0475 ,  H03F1/0222 ,  H03F3/00 ,  H03F3/19 ,  H03F3/24 ,  H03F3/245 ,  H03F2200/102 ,  H03F2200/111 ,  H03F2200/451 ,  H03G3/00 ,  H03G3/3042 ,  H04B1/0458 ,  H04B1/0483 ,  H04B2001/0408 ,  H04B2001/0433 ,  H04L7/0091 ,  H04L7/04

Abstract: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.

公开(公告)号：US09831900B2

公开(公告)日：2017-11-28

申请号：US15079652

申请日：2016-03-24

Applicant: FUJITSU LIMITED

Inventor： Yasuhiro Okawa ,  Takumi Takayashiki

IPC: H04B1/04 ,  H03F1/32 ,  H04L27/36 ,  H04B15/00

CPC classification number: H04B1/0475 ,  H03F1/3241 ,  H03F1/34 ,  H03F3/24 ,  H04B15/00 ,  H04B2001/0408 ,  H04B2001/0433 ,  H04L27/367

Abstract: A wireless communication device includes an antenna, a DPDC, an amplifier, a coupler, and a bias output unit. The DPDC performs distortion compensation on a transmission signal based on a feedback signal. The amplifier amplifies the transmission signal subjected to the distortion compensation by the DPDC. The coupler splits the transmission signal amplified by the amplifier into a transmission signal output to the antenna and the feedback signal input to the DPDC. The DPDC measures an index based on a reflected wave obtained by reflection of the transmission signal split by the coupler from the antenna. The bias output unit applies a bias voltage for controlling an efficiency of an amplifier to the amplifier in accordance with the index measured by the DPDC.