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公开(公告)号：US11521936B2
公开(公告)日：2022-12-06
申请号：US16880592
申请日：2020-05-21
Inventor： Zhen Zhang , Xinwei Wu , Huimin Cao , Kangguan Pan , Fei Li , Yuqing Yang , Yue Wei
IPC: H01L23/544 , G02F1/1333 , G02F1/1345 , H01L27/32
Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a base, a first insulating layer disposed above the base, a first alignment pattern disposed in the peripheral area on a surface of the first insulating layer facing away from the base, and a second alignment pattern disposed in the peripheral area at a side of the first insulating layer away from the base. An orthographic projection of the second alignment pattern on the base and an orthographic projection of the first alignment pattern on the base have a non-overlapping region therebetween, and the second alignment pattern is in contact with the first insulating layer in the non-overlapping region. Adhesion between the second alignment pattern and the first insulating layer is greater than adhesion between the second alignment pattern and the first alignment pattern.
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公开(公告)号：US20220069054A1
公开(公告)日：2022-03-03
申请号：US17415469
申请日：2020-10-12
Inventor： Zhen Zhang , Ning Zhao , Xinwei Wu , Xudong An , Yue Wei , Yuqing Yang
Abstract: Provided are a display panel, a manufacturing method therefor, and a display device. The display panel comprises a hole in a display region and comprises: a substrate; a drive circuit layer comprising a thin film transistor; a wire, connected to the thin film transistor; one or more isolation members surrounding the hole, disposed on the side of the drive circuit layer, and located between the wire and the hole, at least one isolation member comprising a first and a second isolation layer, and an orthographic projection of a surface of the first isolation layer away from the substrate is inside that of the second isolation layer on the substrate; a planarization layer, on the side of the drive circuit layer and covering the wire; and an anode, on the side of the planarization layer and connected to the wire by a via penetrating the planarization layer.
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3.发明申请ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY APPARATUS AND ALIGNMENT RUBBING METHOD 审中-公开阵列基板，液晶显示装置和对准RUBBING方法公开(公告)号：US20140049735A1
公开(公告)日：2014-02-20
申请号：US13805715
申请日：2012-10-10
Inventor： Zailong Mo , Yuqing Yang , Tianlei Shi , Seung Yik Park
IPC: G02F1/1337
CPC classification number: G02F1/133707 , G02F1/133784 , G02F2001/134372
Abstract: Embodiments of the present invention provide an array substrate, a liquid crystal display apparatus and an alignment rubbing method. The array substrate comprises a gate line, a data line, and a pixel unit defined by the gate line and the data line intersecting each other, as well as an alignment film formed on the array substrate. The pixel unit each comprises a thin film transistor, a first electrode, and a second electrode provided with slits; and a first non-zero preset angle is present between a slit-direction of the second electrode and a data-line-direction, a second non-zero preset angle is present between a rubbing direction of the alignment film and the slit-direction of the second electrode, and an angle between the rubbing direction of the alignment film and the data-line-direction is greater than the second non-zero preset angle.
Abstract translation: 本发明的实施例提供阵列基板，液晶显示装置和对准摩擦方法。 阵列基板包括栅极线，数据线和由栅极线和彼此相交的数据线限定的像素单元，以及形成在阵列基板上的取向膜。 像素单元各自包括薄膜晶体管，第一电极和设置有狭缝的第二电极; 并且在第二电极的狭缝方向和数据线方向之间存在第一非零预设角度，在取向膜的摩擦方向和狭缝方向之间存在第二非零预设角度 第二电极和取向膜的摩擦方向与数据线方向之间的角度大于第二非零预设角度。
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公开(公告)号：US11568821B2
公开(公告)日：2023-01-31
申请号：US16982080
申请日：2019-10-24
Inventor： Chaoqun Zhang , Yuqing Yang , Xiping Li , Jiajian Guan
IPC: G09G3/3266 , H01L27/32 , G11C19/28
Abstract: A array substrate includes: a first sub-pixel, a second sub-pixel and a dummy sub-pixel that are located in a display region; a luminance attenuation degree of the first sub-pixel is greater than that of the second sub-pixel along a target direction; and a light-emitting layer of the dummy sub-pixel is configured to emit light having a color the same as that of light emitted by the first sub-pixel. As the dummy sub-pixel further includes the connecting electrode electrically connecting the pixel circuit with the light-emitting layer of the dummy sub-pixel the luminance attenuation of the first sub-pixel may be effectively compensated by driving the dummy sub-pixel to emit light.
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5.发明申请公开(公告)号：US20180076228A1
公开(公告)日：2018-03-15
申请号：US15529963
申请日：2016-09-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zuqiang Wang , Yuqing Yang , Lujiang Huangfu
CPC classification number: H01L27/1218 , H01L23/31 , H01L24/05 , H01L24/29 , H01L24/83 , H01L27/12 , H01L27/124 , H01L27/1262 , H01L2224/04026 , H01L2224/05006 , H01L2924/36
Abstract: Embodiments of the present invention provides an array substrate. The array substrate includes a display region and a packaging region. The packaging region includes a plurality of functional layers. And the packaging region further includes: a plurality of through holes running through at least one of the plurality of functional layers and configured to allow a packaging adhesive to enter therein; and a groove formed above at least some of the through holes, wherein, projection areas of the at least some of the through holes onto a base substrate of the array substrate are located within a projection area of the groove onto the base substrate. Embodiments of the present invention further provides a display panel and a display apparatus including the abovementioned array substrate, and a method of manufacturing the abovementioned array substrate.
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Patent Agency Ranking
公开(公告)号：US20150214120A1
公开(公告)日：2015-07-30
申请号：US14366925
申请日：2013-12-09
Inventor： Yuqing Yang , Seung Yik Park , Byung Chun Lee
IPC: H01L21/8238 , H01L27/12 , H01L21/84
CPC classification number: H01L21/823871 , H01L21/77 , H01L21/84 , H01L27/12 , H01L27/124 , H01L27/1259 , H01L27/1262
Abstract: A method for manufacturing an array substrate includes: forming a shielding layer, an insulating buffer layer, active layers, a gate insulating layer and NMOS gate electrodes in a display area and a drive area on a substrate in sequence; forming a PMOS gate electrode in the drive area on the foregoing substrate, in which the NMOS gate electrodes and the PMOS gate electrode are provided on the same layer; meanwhile forming a first through hole in a common electrode connecting area, in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; forming an intermediate insulating layer on the foregoing substrate, forming a second through hole in the common electrode connecting area and third through holes in the display area and the drive area, in which the second through hole is formed at a same position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the third through holes are configured to connect the active layers and the source/drain electrode layer; and forming the source/drain electrode layer on the foregoing substrate.
Abstract translation: 阵列基板的制造方法包括：依次在显示区域和基板上的驱动区域上形成屏蔽层，绝缘缓冲层，有源层，栅极绝缘层和NMOS栅电极; 在上述基板上的驱动区域中形成PMOS栅电极，其中NMOS栅电极和PMOS栅电极设置在同一层上; 同时在公共电极连接区域中形成第一通孔，其中第一通孔被配置为连接屏蔽层和源极/漏极电极层; 在上述基板上形成中间绝缘层，在公共电极连接区域中形成第二通孔和在显示区域和驱动区域中的第三通孔，其中第二通孔形成在与第一通孔 并且被配置为连接屏蔽层和源极/漏极电极层，并且第三通孔被配置为连接有源层和源极/漏极电极层; 在上述基板上形成源极/漏极电极层。
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公开(公告)号：US11963431B2
公开(公告)日：2024-04-16
申请号：US17042140
申请日：2019-12-24
Inventor： Qian Hu , Yuqing Yang , Fan Yang
IPC: H10K71/00 , G03F1/38 , H10K102/00
CPC classification number: H10K71/00 , G03F1/38 , H10K2102/311
Abstract: A mask for forming a trench in a flexible bendable region of a flexible display panel is provided. The mask includes a first region, a second region, and a third region sandwiched between the first and second regions in a first direction, and the third region has the same pattern as a pattern of a trench to be formed. Light transmission properties of the first and second regions are the same as each other, but are opposite to a light transmission property of the third region. An edge of at least one of the first and second regions proximal to the third region has a plurality of protrusions, and each of the plurality of protrusions has a vertex angle that is at a side proximal to the third region and is not more than 90°. A flexible display panel and a manufacturing method thereof are further provided.
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公开(公告)号：US11903276B2
公开(公告)日：2024-02-13
申请号：US17415469
申请日：2020-10-12
Inventor： Zhen Zhang , Ning Zhao , Xinwei Wu , Xudong An , Yue Wei , Yuqing Yang
IPC: H01L27/32 , H10K59/131 , H10K50/84 , H10K59/124 , H10K71/00 , H10K59/12
CPC classification number: H10K59/131 , H10K50/84 , H10K59/124 , H10K71/00 , H10K59/1201
Abstract: Provided are a display panel, a manufacturing method therefor, and a display device. The display panel comprises a hole in a display region and comprises: a substrate; a drive circuit layer comprising a thin film transistor; a wire, connected to the thin film transistor; one or more isolation members surrounding the hole, disposed on the side of the drive circuit layer, and located between the wire and the hole, at least one isolation member comprising a first and a second isolation layer, and an orthographic projection of a surface of the first isolation layer away from the substrate is inside that of the second isolation layer on the substrate; a planarization layer, on the side of the drive circuit layer and covering the wire; and an anode, on the side of the planarization layer and connected to the wire by a via penetrating the planarization layer.
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公开(公告)号：US11647658B2
公开(公告)日：2023-05-09
申请号：US16760880
申请日：2019-06-28
Inventor： Qun Ma , Yuqing Yang , Qiang Huang
IPC: H01L27/32
CPC classification number: H01L27/3218 , H01L27/3246 , G09G2300/0465 , G09G2320/0242 , G09G2330/12
Abstract: A color shift compensation method, a display panel and a display device are provided. The color shift compensation method includes: acquiring color shift information generated with respect to a test region of a test display panel when the test region is viewed at a first viewing angle, at least a part of first subpixel units within the test region being provided with a test aperture ratio; and controlling, in accordance with the color shift information, at least a part of second subpixel units within a target region of a to-be-manufactured target display panel to be provided with a target aperture ratio being different from the test aperture ratio, to improve color shift within the target region when the target region is viewed at the first viewing angle, wherein a position of the target region on the target display panel is same as a position of the test region on the test display panel, and positions of at least the part of second subpixel units within the target region are same as positions of at least the part of first subpixel units within the test region.
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公开(公告)号：US11641765B2
公开(公告)日：2023-05-02
申请号：US16767249
申请日：2019-11-29
Inventor： Zhen Zhang , Xinwei Wu , Kangguan Pan , Lei Deng , Huimin Cao , Fei Li , Wei Huang , Fuwei Zou , Xia Tang , Xijie Peng , Lin Wen , Xudong An , Junjie Zhao , Yue Wei , Yuqing Yang
Abstract: A backplane, a display device and a method of manufacturing a backplane are provided. The backplane includes a base substrate; an inorganic layer on the base substrate, the inorganic layer including a plurality of protrusions; a metal layer covering atop of each protrusion and partial side wall near the top, the metal layer covering adjacent protrusions being disconnected; and a light-emitting layer covering the metal layer and the inorganic layer between the adjacent protrusions, the light-emitting layer being disconnected at regions of the protrusions not covered by the metal layer.
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