公开(公告)号：US20150214120A1

公开(公告)日：2015-07-30

申请号：US14366925

申请日：2013-12-09

Applicant: BOE Technology Group Co., Ltd ,  Chengdu BOe Optoelectronics Technology Co.Ltd

Inventor： Yuqing Yang ,  Seung Yik Park ,  Byung Chun Lee

IPC: H01L21/8238 ,  H01L27/12 ,  H01L21/84

CPC classification number: H01L21/823871 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/1262

Abstract: A method for manufacturing an array substrate includes: forming a shielding layer, an insulating buffer layer, active layers, a gate insulating layer and NMOS gate electrodes in a display area and a drive area on a substrate in sequence; forming a PMOS gate electrode in the drive area on the foregoing substrate, in which the NMOS gate electrodes and the PMOS gate electrode are provided on the same layer; meanwhile forming a first through hole in a common electrode connecting area, in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; forming an intermediate insulating layer on the foregoing substrate, forming a second through hole in the common electrode connecting area and third through holes in the display area and the drive area, in which the second through hole is formed at a same position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the third through holes are configured to connect the active layers and the source/drain electrode layer; and forming the source/drain electrode layer on the foregoing substrate.

Abstract translation: 阵列基板的制造方法包括：依次在显示区域和基板上的驱动区域上形成屏蔽层，绝缘缓冲层，有源层，栅极绝缘层和NMOS栅电极; 在上述基板上的驱动区域中形成PMOS栅电极，其中NMOS栅电极和PMOS栅电极设置在同一层上; 同时在公共电极连接区域中形成第一通孔，其中第一通孔被配置为连接屏蔽层和源极/漏极电极层; 在上述基板上形成中间绝缘层，在公共电极连接区域中形成第二通孔和在显示区域和驱动区域中的第三通孔，其中第二通孔形成在与第一通孔 并且被配置为连接屏蔽层和源极/漏极电极层，并且第三通孔被配置为连接有源层和源极/漏极电极层; 在上述基板上形成源极/漏极电极层。