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公开(公告)号：US5307024A
公开(公告)日：1994-04-26
申请号：US920076
申请日：1992-07-27
申请人： Arthur J. Metz , James S. Lamb
发明人： Arthur J. Metz , James S. Lamb
IPC分类号： B01J31/24 , C07B61/00 , C07C45/50 , C07C47/02 , C07F9/6568 , C07F15/00 , H03F1/32 , H03F3/45
CPC分类号： C07C45/50 , B01J31/248 , C07F15/008 , C07F9/65683 , H03F1/3211 , H03F3/45098 , H03F3/45197 , B01J2231/321 , B01J2531/822 , H03F2203/45176 , H03F2203/45221 , H03F2203/45454 , H03F2203/45458 , H03F2203/45496 , H03F2203/45648 , H03F2203/45668
摘要： An all NPN transistor level-shifting differential amplifier has first and second identical amplifier halves, in which each amplifier half includes a passive voltage-shifting network coupled between a load and a current source. A main amplifier has a single-ended voltage input and an output coupled to the first node of the voltage shifting network. An output amplifier has a single-ended current output and an input coupled to the second node of the voltage shifting network. The main amplifier and output amplifiers are coupled together such that a portion of the bias and signal currents flowing through the output amplifier is reused and flows through the main amplifier, reducing bias current and power requirements. The first and second amplifier halves are coupled together with a gain-setting emitter resistor. In addition to reducing the power requirements of the amplifier, the feedback configuration of the level-shifting amplifier also increases linearity over prior art level-shifting amplifiers.
摘要翻译： 所有NPN晶体管电平移位差分放大器具有第一和第二相同的放大器半部，其中每个放大器一半包括耦合在负载和电流源之间的无源电压移动网络。 主放大器具有单端电压输入和耦合到电压转换网络的第一节点的输出。 输出放大器具有单端电流输出和耦合到电压转换网络的第二节点的输入。 主放大器和输出放大器耦合在一起，使得流过输出放大器的偏置和信号电流的一部分被重新使用并流过主放大器，减少了偏置电流和功率需求。 第一和第二放大器一半与增益设置发射极电阻耦合在一起。 除了降低放大器的功率需求之外，电平移位放大器的反馈配置还提高了现有技术的电平移位放大器的线性度。
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2.发明授权Variable transient response control for linear integrated-circuit high-frequency amplifiers 失效线性集成电路高频放大器的可变瞬态响应控制
公开(公告)号：US4739283A
公开(公告)日：1988-04-19
申请号：US20270
申请日：1987-03-02
申请人： Arthur J. Metz , James S. Lamb
发明人： Arthur J. Metz , James S. Lamb
CPC分类号： H03G3/18 , H03G1/0052
摘要： A variable transient response control for linear integrated-circuit high-frequency amplifiers comprises a variable equivalent resistive damping network interposed in the signal transmission path, and an electronic control circuit therefor. The resistive network includes preferably Schottky diodes having low inductance and a determinable equivalent resistance in the forward conducting condition.
摘要翻译： 用于线性集成电路高频放大器的可变瞬态响应控制器包括插入在信号传输路径中的可变等效电阻阻尼网络及其电子控制电路。 电阻网络优选地包括在正向导通条件下具有低电感和可确定的等效电阻的肖特基二极管。
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公开(公告)号：US4663610A
公开(公告)日：1987-05-05
申请号：US801118
申请日：1985-11-22
申请人： Arthur J. Metz , James S. Lamb
发明人： Arthur J. Metz , James S. Lamb
CPC分类号： H03M1/745
摘要： A serial DAC comprises two shift registers having their data input terminals connected together for receiving serial binary data. The shift registers are clocked alternately, whereby each shift register is clocked at substantially half the rate at which data is applied to the data input terminals of the shift registers. Two current switches are associated with the shift registers respectively, each switch being operative to steer input current to one of two output terminals if the data output of the associated shift register is a digital 1 and to steer input current to the other output terminal if the data output is a digital 0. Two current sources supply equal, constant currents to input terminals of the two current switches respectively. A third current switch has two output terminals connected to the input terminals of the first and second switches respectively, and is operative to steer its input current to its two output terminals in alternating fashion, switching between its two output terminals at the same rate as the shift registers are clocked. A third constant current source supplies the third switch with an input current equal to that supplied by the first and second sources, and the current supplied by the third current source is added alternately to the current supplied by the first source and the current supplied by the second source.
摘要翻译： 串行DAC包括两个移位寄存器，其数据输入端连接在一起用于接收串行二进制数据。 移位寄存器交替地进行时钟输入，由此每个移位寄存器的时钟基本上是将数据施加到移位寄存器的数据输入端的速率的一半。 两个电流开关分别与移位寄存器相关联，如果相关联的移位寄存器的数据输出是数字1，则每个开关可操作以将输入电流转向两个输出端中的一个，并且如果输入电流 数据输出为数字0.两个电流源分别为两个电流开关的输入端提供相等的恒定电流。 第三电流开关具有分别连接到第一和第二开关的输入端子的两个输出端子，并且可操作地以其交替方式将其输入电流转向其两个输出端子，以与其相同的速率在其两个输出端子之间切换 移位寄存器是时钟。 第三恒流源向第三开关提供等于由第一和第二源提供的输入电流的输入电流，并且将由第三电流源提供的电流交替地添加到由第一源提供的电流和由第一源提供的电流 第二来源。
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公开(公告)号：US4740766A
公开(公告)日：1988-04-26
申请号：US92906
申请日：1987-09-04
申请人： Arthur J. Metz
发明人： Arthur J. Metz
IPC分类号： G05F3/22
CPC分类号： G05F3/222
摘要： A precision current generator provides an output current responsive to a reference supply voltage. The current generator comprises a voltage generator which drives the input to a buffer amplifier. The buffer amplifier output drives the bases of multiple output transistors, the collectors of which form the current outputs. The output current is not dependent upon transistor beta, junction voltage, temperature or supply voltage. The all NPN design enables the current generator to track the reference voltage at high frequencies without peaking or ringing of the output current and without voltage coupling between output devices.
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公开(公告)号：US4322688A
公开(公告)日：1982-03-30
申请号：US083873
申请日：1979-10-11
CPC分类号： H03F3/45103 , H03F1/3211
摘要： The cascode feed forward amplifier is modified to correct alpha-induced error. A pair of resistors are serially disposed between the bases of a pair of common-base amplifiers to generate an error voltage proportional to the input signal. The error voltage is applied to the correction amplifier to provide an appropriate correction current.
摘要翻译： 共源共栅前馈放大器被修改以校正α引起的误差。 一对电阻器串联地布置在一对公共基极放大器的基极之间，以产生与输入信号成比例的误差电压。 误差电压被施加到校正放大器以提供适当的校正电流。
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公开(公告)号：US4797572A
公开(公告)日：1989-01-10
申请号：US6816
申请日：1987-01-21
申请人： Arthur J. Metz
发明人： Arthur J. Metz
CPC分类号： G01R13/32 , G01R13/345
摘要： A trigger re-synchronization circuit providing reduced trigger gate jitter for use in a high speed display device such as an oscilloscope or digitizer. The trigger re-synchronization circuit is cascadable.
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公开(公告)号：US4499386A
公开(公告)日：1985-02-12
申请号：US444764
申请日：1982-11-26
CPC分类号： G01R13/32
摘要： A trigger circuit including arm and trigger comparators which are responsive to the push-pull output from a differential amplifier but insensitive to its common mode component. A controllable hysteresis insertion circuit is also included in the circuit for noise rejection and sensitivity control purposes.
摘要翻译： 包括臂和触发比较器的触发电路，其响应于来自差分放大器的推挽输出，但对其共模模式不敏感。 用于噪声抑制和灵敏度控制的电路中还包括一个可控滞后插入电路。
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公开(公告)号：US4491803A
公开(公告)日：1985-01-01
申请号：US444768
申请日：1982-11-26
CPC分类号： H03F3/45197 , H03F1/3211 , H03F3/45098 , H03G11/002
摘要： A current-limiting circuit for a differential amplifier includes a voltage generator which is switched in parallel with a signal-current-generating impedance connected between the emitters of the differential amplifier transistors whenever an input signal exceeds the voltage of the voltage generator. A practical embodiment for limiting the current in either direction for opposite-polarity input signals includes a pair of voltage generators cross-coupled from a respective differential amplifier transistor base to the opposite transistor emitter via transistor switches.
摘要翻译： 用于差分放大器的限流电路包括电压发生器，每当输入信号超过电压发生器的电压时，电压发生器与连接在差分放大器晶体管的发射极之间的信号电流产生阻抗并联开关。 用于限制用于反极性输入信号的任一方向上的电流的实际实施例包括通过晶体管开关从相应的差分放大器晶体管基极交叉耦合到相对的晶体管发射极的一对电压发生器。
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公开(公告)号：US4340866A
公开(公告)日：1982-07-20
申请号：US75779
申请日：1979-09-17
申请人： Arthur J. Metz
发明人： Arthur J. Metz
CPC分类号： H03F3/45197 , H03F1/3211 , H03F3/45071
摘要： A linear wideband differential amplifier includes a variable gain stage comprising two cross-coupled differential amplifiers and differential current source to compensate for thermal distortion, to minimize transient response distortion, and to eliminate signal attenuation at the center gain setting.
摘要翻译： 线性宽带差分放大器包括可变增益级，包括两个交叉耦合差分放大器和差分电流源，以补偿热失真，最小化瞬态响应失真，并消除中心增益设置处的信号衰减。
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10.发明授权公开(公告)号：US06642741B2
公开(公告)日：2003-11-04
申请号：US10015488
申请日：2001-12-12
IPC分类号： H03K19003
CPC分类号： H04L25/0298
摘要： An integrated circuit includes a termination for a transmission line having a predetermined characteristic impedance. The termination includes a controllable impedance circuit, including a multiplier, coupled to the transmission line. A reference impedance, placed external to the integrated circuit, has an impedance related to the characteristic impedance of the transmission line. A control circuit is coupled between the reference impedance and the controllable impedance circuit, and conditions the controllable impedance circuit to have the characteristic impedance responsive to the reference impedance
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