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公开(公告)号：US12028105B2
公开(公告)日：2024-07-02
申请号：US17868270
申请日：2022-07-19
Applicant: Apple Inc.
Inventor： Krishna Chaitanya Reddy Gangavaram , Ali Parsa
IPC: H04B1/44
CPC classification number: H04B1/44
Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a transmit path, a receive path, and a loopback path that couples the transmit path to the receive path. A passive all-pass filter may be interposed on the loopback path. Control circuitry may calibrate I/Q mismatch of the wireless circuitry using the all-pass filter to optimize the radio-frequency performance of the wireless circuitry. Performing I/Q mismatch calibration using the all-pass filter may serve to minimize area consumption in the transceiver, may minimize calibration time, and may allow for calibration over a relatively wide bandwidth.
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公开(公告)号：US11848680B1
公开(公告)日：2023-12-19
申请号：US17746729
申请日：2022-05-17
Applicant: Apple Inc.
Inventor： Ali Parsa , Ahmed I Hussein
Abstract: This disclosure is directed towards systems and methods that improve bandwidth shifting operations of an ADPLL without losing a lock of the ADPLL and having the benefit of being able to change the bandwidth an unlimited amount of times. Indeed, a processor may transmit amplification parameters to the ADPLL to implement a bandwidth shift. The shift may occur in response to a enable signal, such as a gear trigger control signal (gear_retime signal) or a enable signal generated to cause alignment of the shifting with a clock signal (e.g., enable signal generated by AND logic gates). These systems and methods described herein many enable multiple bandwidth changing operations to occur without compromising the complexity and footprint of the system.
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公开(公告)号：US20220360292A1
公开(公告)日：2022-11-10
申请号：US17868270
申请日：2022-07-19
Applicant: Apple Inc.
Inventor： Krishna Chaitanya Reddy Gangavaram , Ali Parsa
IPC: H04B1/44
Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a transmit path, a receive path, and a loopback path that couples the transmit path to the receive path. A passive all-pass filter may be interposed on the loopback path. Control circuitry may calibrate I/Q mismatch of the wireless circuitry using the all-pass filter to optimize the radio-frequency performance of the wireless circuitry. Performing I/Q mismatch calibration using the all-pass filter may serve to minimize area consumption in the transceiver, may minimize calibration time, and may allow for calibration over a relatively wide bandwidth.
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公开(公告)号：US20240429962A1
公开(公告)日：2024-12-26
申请号：US18214307
申请日：2023-06-26
Applicant: Apple Inc.
Inventor： Hongrui Wang , Abbas Komijani , Ali Parsa
Abstract: In some source degeneration-based cascode LNAs, a cascode transistor may contribute a large portion of noise at mmWave frequencies due to lower output impedance from a bottom transistor (e.g., amplifying transistor or transconductance transistor) of the cascode. The cascode noise may negatively impact performance of the LNA. A first inductor (e.g., cascode inductor) may be coupled to the source of the cascode transistor and a second inductor (e.g., notch inductor) may be coupled to the gate of the bottom transistor such that the cascode inductor and a notch inductor inductively couple to each other, introducing a reverse-transmission zero in-band to reduce or eliminate cascode noise contribution and neutralize gate-drain capacitance of the bottom transistor with minimal area consumption.
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公开(公告)号：US20240146318A1
公开(公告)日：2024-05-02
申请号：US18544289
申请日：2023-12-18
Applicant: Apple Inc.
Inventor： Ali Parsa , Ahmed I Hussein
Abstract: This disclosure is directed towards systems and methods that improve bandwidth shifting operations of an ADPLL without losing a lock of the ADPLL and having the benefit of being able to change the bandwidth an unlimited amount of times. Indeed, a processor may transmit amplification parameters to the ADPLL to implement a bandwidth shift. The shift may occur in response to a enable signal, such as a gear trigger control signal (gear_retime signal) or a enable signal generated to cause alignment of the shifting with a clock signal (e.g., enable signal generated by AND logic gates). These systems and methods described herein many enable multiple bandwidth changing operations to occur without compromising the complexity and footprint of the system.
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Patent Agency Ranking
公开(公告)号：US20170093444A1
公开(公告)日：2017-03-30
申请号：US14870768
申请日：2015-09-30
Applicant: Apple Inc.
Inventor： Navid Lashkarian , Ehsan Adabi , Albert Chia-Wen Jerng , Arya Behzad , Ali Parsa
CPC classification number: H04B1/0475 , H03C5/00 , H03F1/3241 , H04B1/0483 , H04B2001/0425 , H04L27/36 , H04L27/361 , H04L27/368
Abstract: Systems and method provided herein relate to reducing distortion of signals introduced by components on a phase path of a radio frequency system polar architecture. To reduce phase path distortion, a pre-distortion is introduced prior to a distortion caused by the components on the phase path. The pre-distortion in conjunction with the component distortion results in a transmission signal that forms its expected shape.
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公开(公告)号：US09577771B1
公开(公告)日：2017-02-21
申请号：US15218923
申请日：2016-07-25
Applicant: Apple Inc.
Inventor： Navid Lashkarian , Saeed Chehrazi , Ali Parsa
CPC classification number: H04B17/21 , H03F1/0227 , H03F1/0266 , H03F3/19 , H03F2200/102 , H03F2200/411 , H03F2200/451 , H03F2200/465 , H04B17/11 , H04B17/13 , H04B17/14 , H04B17/24
Abstract: Systems and method for improving operation of a radio frequency system are provided. One embodiment provides a radio frequency system that includes an amplifier device with a first data path and a second data path. Additionally, the radio frequency system includes a controller that instructs the radio frequency system to transmit a calibration signal, which includes a first portion that excites the first data path and a second portion that excites the second data path; determines time skew between the first and second data paths based at least in part on phase shift between a first sample of a feedback signal and the first portion, phase shift between a second sample of the feedback signal and the second portion, or both; and instructs the radio frequency system to adjust delay applied on the first data path, the second data path, or both based at least on the time skew.
Abstract translation: 提供了改善射频系统操作的系统和方法。 一个实施例提供一种射频系统，其包括具有第一数据路径和第二数据路径的放大器装置。 另外，射频系统包括指示射频系统发送校准信号的控制器，该校准信号包括激励第一数据路径的第一部分和激励第二数据路径的第二部分; 至少部分地基于反馈信号的第一采样与第一部分之间的相移，反馈信号的第二采样与第二部分之间的相移或两者，确定第一和第二数据路径之间的时间偏移; 并且至少基于时间偏差来指示射频系统调整应用于第一数据路径，第二数据路径或两者的延迟。
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公开(公告)号：US20240322855A1
公开(公告)日：2024-09-26
申请号：US18680776
申请日：2024-05-31
Applicant: Apple Inc.
Inventor： Krishna Chaitanya Reddy Gangavaram , Ali Parsa
IPC: H04B1/44
CPC classification number: H04B1/44
Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a transmit path, a receive path, and a loopback path that couples the transmit path to the receive path. A passive all-pass filter may be interposed on the loopback path. Control circuitry may calibrate I/Q mismatch of the wireless circuitry using the all-pass filter to optimize the radio-frequency performance of the wireless circuitry. Performing I/Q mismatch calibration using the all-pass filter may serve to minimize area consumption in the transceiver, may minimize calibration time, and may allow for calibration over a relatively wide bandwidth.
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公开(公告)号：US20230403016A1
公开(公告)日：2023-12-14
申请号：US17746729
申请日：2022-05-17
Applicant: Apple Inc.
Inventor： Ali Parsa , Ahmed I. Hussein
Abstract: This disclosure is directed towards systems and methods that improve bandwidth shifting operations of an ADPLL without losing a lock of the ADPLL and having the benefit of being able to change the bandwidth an unlimited amount of times. Indeed, a processor may transmit amplification parameters to the ADPLL to implement a bandwidth shift. The shift may occur in response to a enable signal, such as a gear trigger control signal (gear_retime signal) or a enable signal generated to cause alignment of the shifting with a clock signal (e.g., enable signal generated by AND logic gates). These systems and methods described herein many enable multiple bandwidth changing operations to occur without compromising the complexity and footprint of the system.
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公开(公告)号：US11476889B2
公开(公告)日：2022-10-18
申请号：US17191535
申请日：2021-03-03
Applicant: Apple Inc.
Inventor： Krishna Chaitanya Reddy Gangavaram , Ali Parsa
IPC: H04B1/44
Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a transmit path, a receive path, and a loopback path that couples the transmit path to the receive path. A passive all-pass filter may be interposed on the loopback path. Control circuitry may calibrate I/Q mismatch of the wireless circuitry using the all-pass filter to optimize the radio-frequency performance of the wireless circuitry. Performing I/Q mismatch calibration using the all-pass filter may serve to minimize area consumption in the transceiver, may minimize calibration time, and may allow for calibration over a relatively wide bandwidth.
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