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公开(公告)号:US20230084411A1
公开(公告)日:2023-03-16
申请号:US17475255
申请日:2021-09-14
Inventor: Amaury GENDRON-HANSEN , Dumitru Gheorge SDRULLA , Leslie Louis SZEPESI , Tetsuya TAKATA , ltsuo YUZURIHARA , Tomohiro YONEYAMA , Yu HOSOYAMADA
IPC: H01L29/872 , H01L27/06 , H01L29/78 , H01L29/16
Abstract: A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).
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公开(公告)号:US20230139205A1
公开(公告)日:2023-05-04
申请号:US17453300
申请日:2021-11-02
Applicant: Analog Power Conversion LLC
Inventor: Amaury GENDRON-HANSEN , Dumitru Gheorge SDRULLA , Leslie Louis SZEPESI
Abstract: A tub of a semiconductor device includes a cool zone with a first projected operating temperature and a hot zone with a second projected operating temperature greater than the first projected operating temperature. A design parameter has a first value in the cool zone and a second value different from the first value in the hot zone. The difference configures the tub to dissipate less heat in the hot zone during operation of the semiconductor device than would be dissipated if the first and second values were equal. The design parameter may be, for example, a tub width, a source structure width, a JFET region width, a channel length, a channel width, a length of a gate, a displacement of a center of the gate relative to a center of a JFET region, a dopant concentration, or a combination thereof.
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公开(公告)号:US20230021169A1
公开(公告)日:2023-01-19
申请号:US17374734
申请日:2021-07-13
Applicant: Analog Power Conversion LLC
Inventor: Dumitru Gheorge SDRULLA , Amaury GENDRON-HANSEN
Abstract: A semiconductor device is formed having a deep trench, a conductive material disposed in the deep trench, and a dielectric disposed within the deep trench and separating the conductive material from surfaces of the deep trench. The conductive material may be carbon, and may be formed by pyrolysis of an organic material such as a photoresist. The deep trench and the conductive material may be parts of a high-voltage termination of an active device of the semiconductor device. The conductive material may be floating or may be connected to an electrode of the active device.
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公开(公告)号:US20230019985A1
公开(公告)日:2023-01-19
申请号:US17374721
申请日:2021-07-13
Applicant: Analog Power Conversion LLC
Inventor: Amaury GENDRON-HANSEN , Dumitru Gheorge SDRULLA
IPC: H01L29/06 , H01L29/40 , H01L21/761 , H01L21/765
Abstract: A semiconductor device comprises a substrate, a semiconductor layer formed on the substrate; and a high-voltage termination. The high-voltage termination includes a plurality of floating field rings, a deep trench and a dielectric material is disposed within the deep trench. The plurality of floating field rings are formed in the semiconductor layer and respectively disposed around a region of the semiconductor layer. The deep trench is formed in the semiconductor layer and concentrically disposed around an outermost floating field ring of the plurality of floating field rings. The high-voltage termination may also include a field plate disposed over the floating field rings, the deep trench, or both.
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公开(公告)号:US20230012738A1
公开(公告)日:2023-01-19
申请号:US17374706
申请日:2021-07-13
Applicant: Analog Power Conversion LLC
Inventor: Amaury GENDRON-HANSEN , Dumitru Gheorge SDRULLA , Leslie Louis SZEPESI
IPC: H01L29/78 , H01L29/49 , H01L29/786 , H01L29/47 , H01L27/088
Abstract: A semiconductor device includes a substrate, and a plurality of active regions disposed over the substrate. The plurality of active regions have a first total area. One or more inactive regions are also disposed over the substrate. The one or more inactive regions have a second total area. The second total area is greater than or equal to 1.5 times the first total area. The active regions may be formed in an epitaxial layer formed over the substrate. A plurality of cells of an active device may be disposed in the plurality of active regions. The inactive regions may include only structures that do not dissipate substantial power when the semiconductor device is functioning as it is designed to function.
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