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    Joint channel filtering and crest factor reduction architecture
    1.
    发明授权
    Joint channel filtering and crest factor reduction architecture 有权

    公开(公告)号：US12206447B2

    公开(公告)日：2025-01-21

    申请号：US17355200

    申请日：2021-06-23

    Applicant: Altera Corporation

    Inventor： Nima Safari ,  Richard Maiden

    IPC: H04B1/7107 ,  H04B1/00 ,  H04B1/62

    Abstract: A signal processing device includes a filter, configured to receive first data representing a signal for wireless transmission, modify the first data in a filter operation, and output second data as the modified first data; a peak detector, configured to detect third data representing a peak of the signal, wherein the third data are a subset of the first data; a signal canceller, configured to receive the third data and to generate fourth data representing a cancellation signal corresponding to the peak of the signal; and a peak modifier, configured to receive the second data and the fourth data, and to generate fifth data using the second data and the fourth data, wherein the fifth data represent the signal with a modified peak.

    Methods and apparatus for implementing feedback loops
    2.
    发明授权
    Methods and apparatus for implementing feedback loops 有权

    公开(公告)号：US09660624B1

    公开(公告)日：2017-05-23

    申请号：US14221819

    申请日：2014-03-21

    Applicant: Altera Corporation

    Inventor： Nima Safari ,  Volker Mauer ,  Shahin Gheitanchi

    IPC: G06F17/10 ,  H03K5/14

    CPC classification number: H03K5/14 ,  H03H17/00 ,  H03H17/04

    Abstract: Circuitry that efficiently implements loop functions in an integrated circuit is provided. The circuitry combines a feed-forward circuit with a feedback loop that includes a unit delay element in a feedback path. The feedback path may couple the output of a processing element to the input of the processing element. The processing element may implement a function that satisfies commutative, associative, and distributive properties. Combining the feedback loop with the feed-forward circuit may allow for register retiming in the feedback loop and for register pipelining with optional register retiming in the feed-forward circuit. The circuitry may thus trade off an increase in throughput and clock frequency for additional resources.

    Multi-standard peak canceling circuitry
    3.
    发明授权
    Multi-standard peak canceling circuitry 有权
    多标准峰值消除电路

    公开(公告)号：US09485129B1

    公开(公告)日：2016-11-01

    申请号：US14325184

    申请日：2014-07-07

    Applicant: Altera Corporation

    Inventor： Benjamin Thomas Cope ,  Volker Mauer ,  Shahin Gheitanchi ,  Nima Safari

    IPC: H04L27/26

    CPC classification number: H04L27/2623

    Abstract: Integrated circuits with wireless communications circuitry having peak cancelation circuitry operable to perform crest factor reduction is provided. The peak cancelation circuitry may receive at least first and second carrier waveforms and may include at least a first canceling pulse generator (CPG), a second CPG, a first peak detector for performing peak detection on the first waveform, a second peak detector for performing peak detection on the second waveform, a third peak detector for performing peak detection on a combined waveform of the first and second waveforms, and a pulse allocator that receives clipping information from the three peak detectors and that controls the amount of peak cancelation that is being performed by the two CPGs. The allocator may determine whether the combined waveform contains any peaks. In response to determining that the combined waveform does not contain any peaks, the CPGs may be configured in bypass mode.

    Abstract translation: 提供具有无线通信电路的集成电路，其具有可操作以执行波峰因数降低的峰值消除电路。 峰值消除电路可以接收至少第一和第二载波波形，并且可以包括至少第一抵消脉冲发生器（CPG），第二CPG，用于在第一波形上执行峰值检测的第一峰值检测器，用于执行 在第二波形上的峰值检测，用于对第一和第二波形的组合波形执行峰值检测的第三峰值检测器，以及从三个峰值检测器接收限幅信息并且控制正在被去除的峰值消除量的脉冲分配器 由两个CPG执行。 分配器可以确定组合波形是否包含任何峰值。 响应于确定组合波形不包含任何峰值，CPG可以被配置为旁路模式。

    Methods and apparatus for adjusting transmit signal clipping thresholds
    6.
    发明授权
    Methods and apparatus for adjusting transmit signal clipping thresholds 有权
    调整发射信号限幅阈值的方法和装置

    公开(公告)号：US09337782B1

    公开(公告)日：2016-05-10

    申请号：US14283703

    申请日：2014-05-21

    Applicant: Altera Corporation

    Inventor： Volker Mauer ,  Nima Safari ,  Shahin Gheitanchi ,  Richard Maiden

    IPC: H04B1/04 ,  H03F1/32 ,  H03F3/19 ,  H03F3/24 ,  H04L27/34

    CPC classification number: H03F1/3247 ,  H03F1/3241 ,  H03F3/19 ,  H03F3/245 ,  H03F2200/435 ,  H03F2200/451 ,  H03F2201/3227 ,  H04B1/0475 ,  H04B2001/0425 ,  H04L25/03343 ,  H04L27/3411

    Abstract: Integrated circuits are provided with wireless communications circuitry having digital predistortion (DPD) circuitry, peak canceling circuitry, a power amplifier, and signal conditioning circuitry for controlling the DPD and peak canceling circuitry. The peak canceling circuitry may receive transmit signals and may clip peaks in the transmit signals that exceed a magnitude threshold value. The DPD circuitry may compensate for non-linear characteristics of the power amplifier by outputting a predistorted version of the clipped transmit signals. The power amplifier may receive the predistorted signals and may perform amplification to generate amplified signals. The signal conditioning circuitry may identify power transfer characteristics of the power amplifier and DPD circuitry using the predistorted signals and the amplified signals. The signal conditioning circuitry may update the magnitude threshold value imposed by the peak canceling threshold based on the identified power transfer characteristics to mitigate out-of-band spectral regrowth in the predistorted signals.

    Abstract translation: 集成电路配备有具有数字预失真（DPD）电路，峰值消除电路，功率放大器和用于控制DPD和峰值消除电路的信号调节电路的无线通信电路。 峰值消除电路可以接收发射信号，并且可以在超过幅度阈值的发射信号中削波峰值。 DPD电路可以通过输出限幅发送信号的预失真版本来补偿功率放大器的非线性特性。 功率放大器可以接收预失真信号，并且可以执行放大以产生放大的信号。 信号调节电路可以使用预失真信号和放大信号来识别功率放大器和DPD电路的功率传输特性。 信号调节电路可以基于所识别的功率传输特性来更新由峰值消除阈值施加的幅度阈值，以减轻预失真信号中的带外频谱再生长。

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