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公开(公告)号:US10043716B2
公开(公告)日:2018-08-07
申请号:US15243732
申请日:2016-08-22
申请人: Altera Corporation
发明人: Dustin Do , Andy L. Lee , Giles V. Powell , Bradley Jensen , Swee Aun Lau , Wuu-Cherng Lin , Thomas H. White
IPC分类号: H01L21/8234 , H01L21/3205 , H01L21/762 , H01L27/02 , H01L21/8238 , H01L29/78
CPC分类号: H01L21/823493 , H01L21/32055 , H01L21/76224 , H01L21/823475 , H01L21/823481 , H01L21/823871 , H01L21/823892 , H01L27/0207 , H01L29/7833
摘要: Embodiments of N-well or P-well strap structures are disclosed with lower space requirements achieved by forming the strap on both sides of one or more floating polysilicon gate fingers.
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公开(公告)号:US20160358825A1
公开(公告)日:2016-12-08
申请号:US15243732
申请日:2016-08-22
申请人: Altera Corporation
发明人: Dustin Do , Andy L. Lee , Giles V. Powell , Bradley Jensen , Swee Aun Lau , Wuu-Cherng Lin , Thomas H. White
IPC分类号: H01L21/8234 , H01L21/762 , H01L21/3205
CPC分类号: H01L21/823493 , H01L21/32055 , H01L21/76224 , H01L21/823475 , H01L21/823481 , H01L21/823871 , H01L21/823892 , H01L27/0207 , H01L29/7833
摘要: Embodiments of N-well or P-well strap structures are disclosed with lower space requirements achieved by forming the strap on both sides of one or more floating polysilicon gate fingers.
摘要翻译: 公开了N阱或P阱带结构的实施例,其通过在一个或多个浮动多晶硅栅极指的两侧形成带而获得较低的空间要求。
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公开(公告)号:US20140159157A1
公开(公告)日:2014-06-12
申请号:US13708556
申请日:2012-12-07
申请人: Altera Corporation
发明人: Bradley Jensen , Shue Ling Ong , Dustin Do , Wuu-Cherng Lin
IPC分类号: H01L27/088 , H01L29/66
CPC分类号: H01L27/088 , H01L27/0207 , H01L27/0629 , H01L29/66477 , H01L29/78
摘要: An integrated circuit with an antenna diode is described. The integrated circuit includes a substrate, a transistor, first and second diffusion regions, and a dummy gate. The transistor and the first and second diffusion regions may be formed within the substrate. The transistor has its gate structure disposed on the substrate. The dummy gate structure may be disposed on a region of the substrate such that it separates the first diffusion region from the second diffusion region. The dummy gate structure may also be coupled to the transistor gate structure.
摘要翻译: 描述了具有天线二极管的集成电路。 集成电路包括衬底,晶体管,第一和第二扩散区域以及虚拟栅极。 晶体管和第一和第二扩散区可以形成在衬底内。 晶体管的栅极结构设置在基板上。 伪栅极结构可以设置在衬底的区域上,使得其将第一扩散区域与第二扩散区域分离。 虚拟栅极结构也可以耦合到晶体管栅极结构。
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