Method and device for measuring the relative local position error of one of the sections of an object that is exposed section by section
    3.
    发明授权
    Method and device for measuring the relative local position error of one of the sections of an object that is exposed section by section 有权
    用于测量被逐个暴露的对象的一个​​部分的相对局部位置误差的方法和装置

    公开(公告)号:US08731273B2

    公开(公告)日:2014-05-20

    申请号:US13130600

    申请日:2009-11-28

    Abstract: A method for measuring the relative local position error of one of the sections of an object that is exposed section by section, in particular of a lithography mask or of a wafer, is provided, each exposed section having a plurality of measurement marks, wherein a) a region of the object which is larger than the one section is imaged in magnified fashion and is detected as an image, b) position errors of the measurement marks contained in the detected image are determined on the basis of the detected image, c) corrected position errors are derived by position error components which are caused by the magnified imaging and detection being extracted from the determined position errors of the measurement marks, d) the relative local position error of the one section is derived on the basis of the corrected position errors of the measurement marks.

    Abstract translation: 提供了一种用于测量逐段暴露的物体的一个部分(特别是光刻掩模或晶片)的相对局部位置误差的方法,每个暴露部分具有多个测量标记,其中 )以放大的方式成像大于该部分的对象的区域,并且被检测为图像,b)基于检测到的图像确定检测图像中包含的测量标记的位置误差,c) 校正位置误差是通过由放大的成像和检测引起的位置误差分量从确定的测量标记的位置误差中提取导出的,d)基于校正位置导出一个部分的相对局部位置误差 测量标记的误差。

    METHOD AND APPARATUS FOR CORRECTING ERRORS ON A WAFER PROCESSED BY A PHOTOLITHOGRAPHIC MASK
    4.
    发明申请
    METHOD AND APPARATUS FOR CORRECTING ERRORS ON A WAFER PROCESSED BY A PHOTOLITHOGRAPHIC MASK 审中-公开
    用于校正由光刻胶掩模处理的波形上的误差的方法和装置

    公开(公告)号:US20120154773A1

    公开(公告)日:2012-06-21

    申请号:US13310071

    申请日:2011-12-02

    Applicant: Dirk Beyer

    Inventor: Dirk Beyer

    Abstract: A method for correcting errors on a wafer processed by a photolithographic mask at a wafer processing site is provided. The method comprises measuring errors on the wafer, and modifying a pattern placement on the photolithographic mask by locally applying femtosecond light pulses of a laser system to the photolithographic mask at the wafer processing site.

    Abstract translation: 提供了一种用于校正在晶片加工位置由光刻掩模处理的晶片上的误差的方法。 该方法包括测量晶片上的误差,并通过在晶片处理部位局部地将激光系统的飞秒光脉冲局部施加到光刻掩模来修改光刻掩模上的图案位置。

    Method of dividing past computing instances into predictable and unpredictable sets and method of predicting computing value
    5.
    发明授权
    Method of dividing past computing instances into predictable and unpredictable sets and method of predicting computing value 有权
    将过去的计算实例划分为可预测和不可预测的集合的方法以及预测计算值的方法

    公开(公告)号:US07720771B1

    公开(公告)日:2010-05-18

    申请号:US11165810

    申请日:2005-06-24

    CPC classification number: G06N99/005

    Abstract: An embodiment of a method of dividing past computing instances into predictable and unpredictable sets begins with a first step of a computing entity storing a training data set comprising past computing instances. Each past computing instance comprises attributes and a past computing value. In a second step, the computing entity separates the training data set into a predictable set of past computing instances and an unpredictable set of past computing instances. According to an embodiment, a method of predicting a computing value begins with the first and second steps. The method of predicting the computing value continues with a third step of the computing entity forming a predictor from the predictable set of past computing instances. In a fourth step, the computing entity applies the predictor to a pending computing instance that meets a predictability test to determine a predicted value for the pending computing instance.

    Abstract translation: 将过去的计算实例划分为可预测和不可预测的集合的方法的实施例开始于存储包括过去的计算实例的训练数据集的计算实体的第一步骤。 每个过去的计算实例包括属性和过去的计算值。 在第二步骤中,计算实体将训练数据集分成可预测的一组过去的计算实例和不可预测的一组过去的计算实例。 根据实施例,预测计算值的方法从第一和第二步骤开始。 预测计算值的方法继续,计算实体的第三步从预测的一组过去的计算实例形成预测器。 在第四步骤中,计算实体将预测器应用于满足可预测性测试的待决计算实例以确定未决计算实例的预测值。

    Process for controlling the proximity effect correction
    7.
    发明申请
    Process for controlling the proximity effect correction 有权
    用于控制邻近效应校正的过程

    公开(公告)号:US20050287450A1

    公开(公告)日:2005-12-29

    申请号:US11165312

    申请日:2005-06-23

    Abstract: A process for controlling the proximity effect correction in an electron beam lithography system. The exposure is controlled in order to obtain resulting pattern after processing which is conform to design data. In a first step an arbitrary set patterns is exposed without applying the process for controlling the proximity correction. The geometry of the resulting test structures is measured and a set of measurement data is obtained. Within a numerical range basic input parameters for the parameters α, β and η, are derived from the set of measurement data. A model is fitted by individually changing at least the basic input parameters α, β and η of a control function to measurement data set and thereby obtaining an optimised set of parameters. The correction function is applied to an exposure control of the electron beam lithography system during the exposure of a pattern according to the design data.

    Abstract translation: 一种用于控制电子束光刻系统中的邻近效应校正的方法。 控制曝光以便在符合设计数据的处理之后获得所得到的图案。 在第一步骤中,暴露任意设置模式,而不应用用于控制接近校正的处理。 测量所得测试结构的几何形状并获得一组测量数据。 在数值范围内,参数α,β和eta的基本输入参数从测量数据集中推导出来。 通过将控制功能的至少基本输入参数α,β和eta单独地改变到测量数据集,从而获得优化的参数集合来适配模型。 在根据设计数据曝光图案期间,将校正功能应用于电子束光刻系统的曝光控制。

    Method and device for exposing a substrate to light
    8.
    发明授权
    Method and device for exposing a substrate to light 失效
    将基板曝光的方法和装置

    公开(公告)号:US06600162B1

    公开(公告)日:2003-07-29

    申请号:US09600477

    申请日:2000-09-21

    Abstract: The invention concerns a method for exposing a substrate (1) equipped with an n-layer photoresist system (2), an electrically conductive connection being created between a ground potential and the substrate (1) and/or at least one of the layers S1 through Sn of the photoresist system (2). The invention furthermore concerns an arrangement for carrying out said method. According to the present invention, what is achieved in a single process step is that by way of spring elements E1 through E4, a contact tip K1 is advanced as far as the layer S1, a contact tip K2 is advanced through the layer S1 as far as the layer S2, a contact tip K3 is advanced through the layer S1 and S2 as far as the layer S3, and so forth. The electrical charges from the layer S1 are dissipated to the ground potential via the contact tip K1, the charges from the layer S2 via the contact tip K2, etc., and/or and from the substrate (1) via a contact tip K4.

    Abstract translation: 本发明涉及一种用于暴露具有n层光致抗蚀剂系统(2)的衬底(1)的方法,在接地电位和衬底(1)之间产生的导电连接和/或层S1中的至少一个 通过光致抗蚀剂体系(2)的Sn。 本发明还涉及用于执行所述方法的装置。 根据本发明,在单个工艺步骤中实现的是通过弹簧元件E1至E4,接触尖端K1前进到层S1,接触尖端K2通过层S1前进到远 作为层S2,接触尖端K3通过层S1和S2前进直到层S3等等。 来自层S1的电荷经由接触尖端K1,来自层S2的电荷经由接触尖端K2等和/或从衬底(1)经由接触尖端K4消散到接地电位。

    Scheduling computer processing jobs that have stages and precedence constraints among the stages
    9.
    发明授权
    Scheduling computer processing jobs that have stages and precedence constraints among the stages 有权
    调度在阶段之间具有阶段和优先级约束的计算机处理作业

    公开(公告)号:US08281313B1

    公开(公告)日:2012-10-02

    申请号:US11241720

    申请日:2005-09-29

    CPC classification number: G06F9/5038 G06F2209/506

    Abstract: An embodiment of a method of scheduling computer processing begins with a first step of receiving job properties for a plurality of jobs to be processed in a multi-processor computing environment. At least some of the jobs each comprise a plurality of stages, one or more tasks for each stage, and precedence constraints among the stages. The method continues with a second step of determining a schedule for processing at least a subset of the plurality of jobs on processors within the multi-processor computing environment from a solution of a mathematical program that provides a near maximal completion reward. The schedule comprises a sequence of tasks for each processor. In a third step, the computer processing jobs are processed on the processors according to the sequence of tasks for each processor.

    Abstract translation: 调度计算机处理方法的一个实施例开始于在多处理器计算环境中接收要处理的多个作业的作业属性的第一步骤。 至少一些作业各自包括多个阶段,每个阶段的一个或多个任务以及阶段之间的优先约束。 该方法继续第二步骤,从提供接近最大完成奖励的数学程序的解决方案确定用于处理多处理器计算环境中的处理器上的多个作业的至少一个子集的调度表。 该计划包括每个处理器的一系列任务。 在第三步骤中,根据每个处理器的任务顺序在处理器上处理计算机处理作业。

    Job scheduling system and method
    10.
    发明授权
    Job scheduling system and method 有权
    作业调度系统和方法

    公开(公告)号:US07958507B2

    公开(公告)日:2011-06-07

    申请号:US11154305

    申请日:2005-06-16

    CPC classification number: G06F9/5038 G06F9/4887 G06F2209/506

    Abstract: In at least some embodiments, a method comprises computing an initial schedule of jobs to be run on a computing system using a mathematical program and monitoring the computing system. The method also comprises, based on the monitoring, determining, using the mathematical program used to compute the initial schedule, whether the initial schedule should be re-computed.

    Abstract translation: 在至少一些实施例中,一种方法包括使用数学程序和监视计算系统来计算要在计算系统上运行的作业的初始调度。 该方法还包括基于监视,使用用于计算初始调度的数学程序来确定是否应重新计算初始调度。

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