公开(公告)号：US20140145186A1

公开(公告)日：2014-05-29

申请号：US14167131

申请日：2014-01-29

Applicant: APPLIED MATERIALS, INC.

Inventor： Yan YE

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66742

Abstract: The present invention generally relates to an offset electrode TFT and a method of its manufacture. The offset electrode TFT is a TFT in which one electrode, either the source or the drain, surrounds the other electrode. The gate electrode continues to be below both the source and the drain electrodes. By redesigning the TFT, less voltage is necessary to transfer the voltage from the source to the drain electrode as compared to traditional bottom gate TFTs or top gate TFTs. The offset electrode TFT structure is applicable not only to silicon based TFTs, but also to transparent TFTs that include metal oxides such as zinc oxide or IGZO and metal oxynitrides such as ZnON.

Abstract translation: 本发明一般涉及一种偏移电极TFT及其制造方法。 偏移电极TFT是其中一个电极（源极或漏极）围绕另一个电极的TFT。 栅电极继续在源电极和漏电极之下。 通过重新设计TFT，与传统的底栅TFT或顶栅TFT相比，需要较少的电压来将源极电压转移到漏电极。 偏移电极TFT结构不仅适用于硅基TFT，而且可应用于包括诸如氧化锌或IGZO的金属氧化物和诸如ZnON的金属氧氮化物的透明TFT。

公开(公告)号：US20170133492A1

公开(公告)日：2017-05-11

申请号：US15412519

申请日：2017-01-23

Applicant: Applied Materials, Inc.

Inventor： Jrjyan Jerry CHEN ,  Soo Young CHOI ,  Dong-Kil YIM ,  Yan YE

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/02565 ,  H01L29/78606 ,  H01L29/7869

Abstract: The present invention generally relates to a method of manufacturing a TFT. The TFT has an active channel that comprises IGZO or zinc oxide. After the source and drain electrodes are formed, but before the passivation layers or etch stop layers are deposited thereover, the active channel is exposed to an N2O or O2 plasma. The interface between the active channel and the passivation layers or etch stop layers are either altered or damaged during formation of the source and drain electrodes. The N2O or O2 plasma alters and repairs the interface between the active channel and the passivation or etch stop layers.

公开(公告)号：US20140110714A1

公开(公告)日：2014-04-24

申请号：US14039046

申请日：2013-09-27

Applicant: Applied Materials, Inc.

Inventor： Yan YE

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/786 ,  H01L29/78693

Abstract: The present invention generally relates to an amorphous semiconductor material and TFTs containing the material. The semiconductor material contains a single cation, such as zinc, and multiple anions. For the multiple anions, only one of the anions can be oxygen or nitrogen. The anions compete with each other to twist the resulting structure. For example, if one of the anions bonded with the cation would result in a cubic structure, and another of the anions bonded with the cation would result in a hexagonal structure, the competing anions would twist the resulting structure so that the structure remains amorphous rather than crystalline. Further, because a single cation is utilized, there is no grain boundary and thus, the material has a high mobility.

Abstract translation: 本发明一般涉及非晶半导体材料和含有该材料的TFT。 半导体材料含有单一的阳离子，如锌，和多个阴离子。 对于多种阴离子，只有一种阴离子可以是氧或氮。 阴离子彼此竞争扭曲结果。 例如，如果与阳离子结合的阴离子之一将导致立方结构，并且与阳离子结合的另一个阴离子将导致六方结构，则竞争的阴离子将扭转所得结构，使得该结构保持无定形 比结晶。 此外，由于使用单个阳离子，因此不存在晶界，因此该材料具有高迁移率。

公开(公告)号：US20140339536A1

公开(公告)日：2014-11-20

申请号：US13932340

申请日：2013-07-01

Applicant: APPLIED MATERIALS, INC.

Inventor： Yan YE ,  Harvey YOU

IPC: H01L29/786 ,  H01L29/24 ,  H01L21/283

CPC classification number: H01L29/7869 ,  H01L29/24

Abstract: Embodiments disclosed herein generally relate to thin film transistors with one or more trenches to control the threshold voltage and off-current and methods of making the same. In one embodiment, a semiconductor device can include a substrate comprising a surface with a thin film transistor formed thereon, a first passivation layer formed over the thin film transistor, a trench formed within the first passivation layer and a second passivation layer formed over the first passivation layer and within the trench.

Abstract translation: 本文公开的实施例通常涉及具有一个或多个沟槽以控制阈值电压和截止电流的薄膜晶体管及其制造方法。 在一个实施例中，半导体器件可以包括衬底，该衬底包括其上形成有薄膜晶体管的表面，形成在薄膜晶体管上的第一钝化层，形成在第一钝化层内的沟槽和形成在第一钝化层上的第二钝化层 钝化层和沟槽内。

公开(公告)号：US20140264354A1

公开(公告)日：2014-09-18

申请号：US14203433

申请日：2014-03-10

Applicant: APPLIED MATERIALS, INC.

Inventor： Kurtis LESCHKIES ,  Steven VERHAVERBEKE ,  Robert VISSER ,  John M. WHITE ,  Yan YE ,  Dong-Kil YIM

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/4908

Abstract: The present invention generally relates to a thin film semiconductor device having a buffer layer formed between the semiconductor layer and one or more layers. In one embodiment, a thin film semiconductor device includes a semiconductor layer having a first work function and a first electron affinity level, a buffer layer having a second work function greater than the first work function and a second electron affinity level that is less than the first electron affinity level; and a gate dielectric layer having a third work function less than the second work function and a third electron affinity level that is greater than the second electron affinity level.

Abstract translation: 本发明一般涉及一种在半导体层与一层或多层之间形成缓冲层的薄膜半导体器件。 在一个实施例中，薄膜半导体器件包括具有第一功函数和第一电子亲和度的半导体层，具有大于第一功函数的第二功函数的缓冲层和小于第一功函数的第二电子亲和度 第一电子亲和力水平; 以及具有小于第二功函数的第三功函数和大于第二电子亲和度的第三电子亲和度的栅介质层。

公开(公告)号：US20140124712A1

公开(公告)日：2014-05-08

申请号：US14095914

申请日：2013-12-03

Applicant: Applied Materials, Inc.

Inventor： Yan YE

IPC: H01L27/01 ,  H01L21/02

CPC classification number: H01L27/016 ,  C23C14/0036 ,  C23C14/0676 ,  H01L21/02521 ,  H01L21/02554 ,  H01L21/0257 ,  H01L21/02631 ,  H01L29/22 ,  H01L29/7869

Abstract: The present invention generally comprises a semiconductor film and the reactive sputtering process used to deposit the semiconductor film. The sputtering target may comprise pure zinc (i.e., 99.995 atomic percent or greater), which may be doped with aluminum (about 1 atomic percent to about 20 atomic percent) or other doping metals. The zinc target may be reactively sputtered by introducing nitrogen and oxygen to the chamber. The amount of nitrogen may be significantly greater than the amount of oxygen and argon gas. The amount of oxygen may be based upon a turning point of the film structure, the film transmittance, a DC voltage change, or the film conductivity based upon measurements obtained from deposition without the nitrogen containing gas. The reactive sputtering may occur at temperatures from about room temperature up to several hundred degrees Celsius. After deposition, the semiconductor film may be annealed to further improve the film mobility.

Abstract translation: 本发明通常包括半导体膜和用于沉积半导体膜的反应性溅射工艺。 溅射靶可以包括纯锌（即99.995原子％或更大），其可以掺杂有铝（约1原子％至约20原子％）或其它掺杂金属。 锌靶可以通过将氮和氧引入室来进行反应溅射。 氮的量可以显着大于氧气和氩气的量。 氧气的量可以基于薄膜结构的转折点，膜透射率，直流电压变化或基于通过不含氮气气体的沉积获得的测量值的膜电导率。 反应性溅射可以在约室温至几百摄氏度的温度下进行。 在沉积之后，半导体膜可以退火以进一步提高膜迁移率。