公开(公告)号：US20210200433A1

公开(公告)日：2021-07-01

申请号：US17199949

申请日：2021-03-12

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Yi XU ,  Nuwan S. JAYASENA ,  Yuan XIE

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02 ,  G06F13/42 ,  G06F1/3203 ,  G11C7/10

Abstract: An integrated circuit device includes a memory controller coupleable to a memory. The memory controller to schedule memory accesses to regions of the memory based on memory timing parameters specific to the regions. A method includes receiving a memory access request at a memory device. The method further includes accessing, from a timing data store of the memory device, data representing a memory timing parameter specific to a region of the memory cell circuitry targeted by the memory access request. The method also includes scheduling, at the memory controller, the memory access request based on the data.

公开(公告)号：US20230142598A1

公开(公告)日：2023-05-11

申请号：US17950476

申请日：2022-09-22

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Yi XU ,  Nuwan S. JAYASENA ,  Yuan XIE

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/02 ,  G06F13/42 ,  G06F1/3203 ,  G11C7/10

CPC classification number: G06F3/061 ,  G06F13/161 ,  G06F12/02 ,  G06F13/4243 ,  G06F3/0613 ,  G06F3/0625 ,  G06F3/0656 ,  G06F3/0611 ,  G06F3/0673 ,  G06F1/3203 ,  G06F13/1636 ,  G11C7/1072 ,  Y02D10/00

Abstract: An integrated circuit device includes a memory controller coupleable to a memory. The memory controller to schedule memory accesses to regions of the memory based on memory timing parameters specific to the regions. A method includes receiving a memory access request at a memory device. The method further includes accessing, from a timing data store of the memory device, data representing a memory timing parameter specific to a region of the memory cell circuitry targeted by the memory access request. The method also includes scheduling, at the memory controller, the memory access request based on the data.

公开(公告)号：US20150100735A1

公开(公告)日：2015-04-09

申请号：US14229420

申请日：2014-03-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Zhe WANG ,  Yuan XIE ,  Yi XU ,  Junli GU ,  Ting CAO

IPC: G06F12/12

CPC classification number: G06F12/126 ,  G06F3/0614 ,  G06F3/0619 ,  G06F3/0628 ,  G06F3/0653 ,  G06F3/0673 ,  G06F3/0674 ,  G06F3/0676 ,  G06F12/00 ,  G06F12/02 ,  G06F12/0223 ,  G06F12/0246 ,  G06F12/0253 ,  G06F12/0808 ,  G06F12/0815 ,  G06F12/0871 ,  G06F12/12 ,  G06F12/121

Abstract: A method, a system and a computer-readable medium for writing to a cache memory are provided. The method comprises maintaining a write count associated with a set, the set containing a memory block associated with a physical block address. A mapping from a logical address to the physical address of the block is also maintained. The method shifts the mapping based on the value of the write count and writes data to the block based on the mapping.

Abstract translation: 提供了一种用于写入高速缓冲存储器的方法，系统和计算机可读介质。 该方法包括维持与集合相关联的写入计数，该集合包含与物理块地址相关联的存储器块。 也保持从逻辑地址到块的物理地址的映射。 该方法基于写入计数的值移动映射，并基于映射将数据写入块。