公开(公告)号：US08530263B2

公开(公告)日：2013-09-10

申请号：US13207058

申请日：2011-08-10

申请人： Wen-Chin Lee ,  Wen-Tsai Yen ,  Liang-Sheng Yu ,  Yung Sheng Chiu

发明人： Wen-Chin Lee ,  Wen-Tsai Yen ,  Liang-Sheng Yu ,  Yung Sheng Chiu

IPC分类号： H01L21/00 ,  H01L31/00

CPC分类号： H01L31/1864 ,  H01L31/022425 ,  H01L31/046 ,  H01L31/0465 ,  Y02E10/50

摘要： A method of fabricating a solar cell includes forming a front contact layer over a substrate, and the front contact layer is optically transparent at specified wavelengths and electrically conductive. A first scribed area is scribed through the front contact layer to expose a portion of the substrate. A buffer layer doped with an n-type dopant is formed over the front contact layer and the first scribed area. An absorber layer doped with a p-type dopant is formed over the buffer layer. A back contact layer that is electrically conductive is formed over the absorber layer.

摘要翻译： 制造太阳能电池的方法包括在衬底上形成前接触层，并且前接触层在特定波长处是光学透明的并且是导电的。 通过前接触层划刻第一划线区域以暴露基板的一部分。 掺杂有n型掺杂剂的缓冲层形成在前接触层和第一划线区上。 在缓冲层上形成掺杂有p型掺杂剂的吸收层。 在吸收层上形成导电的背接触层。

公开(公告)号：US20130118569A1

公开(公告)日：2013-05-16

申请号：US13295148

申请日：2011-11-14

申请人： Wen-Chin Lee ,  Liang-Sheng Yu ,  Wen-Tsai Yen ,  Yung-Sheng Chiu

发明人： Wen-Chin Lee ,  Liang-Sheng Yu ,  Wen-Tsai Yen ,  Yung-Sheng Chiu

IPC分类号： H01L31/0224 ,  H01L31/18

CPC分类号： H01L31/0749 ,  H01L31/0322 ,  H01L31/0463 ,  Y02E10/541 ,  Y02P70/521

摘要： A thin film solar cell and process for forming the same. The solar cell includes a bottom electrode layer, a light absorbing semiconductor layer, and top electrode layer. The absorber layer includes a p-type interior region and an n-type exterior region formed around the perimeter of the layer from a modified native portion of the p-type interior region, thereby forming an active n-p junction that is an intrinsic part of the absorber layer. The top electrode layer is electrically connected to the bottom electrode layer via a scribe line formed in the absorber layer that defines sidewalls. The n-type exterior region of the absorber layer extends along both the horizontal top of the absorber layer, and onto the vertical sidewalls of the scribe line to increase the area of available n-p junction in the solar cell thereby improving solar conversion efficiency.

摘要翻译： 薄膜太阳能电池及其形成方法。 太阳能电池包括底部电极层，光吸收半导体层和顶部电极层。 吸收层包括p型内部区域和从p型内部区域的修饰的天然部分围绕该层的周边形成的n型外部区域，从而形成作为p型内部区域的固有部分的活性np结， 吸收层。 顶部电极层通过形成在限定侧壁的吸收体层中的划痕线电连接到底部电极层。 吸收层的n型外部区域沿着吸收层的水平顶部延伸，并且延伸到划线的垂直侧壁上，以增加太阳能电池中可用的n-p结的面积，从而提高太阳能转换效率。

公开(公告)号：US20130075247A1

公开(公告)日：2013-03-28

申请号：US13239989

申请日：2011-09-22

申请人： Wen-Chin Lee ,  Wen-Tsai Yen ,  Yung-Sheng Chiu ,  Ying Chen Chao

发明人： Wen-Chin Lee ,  Wen-Tsai Yen ,  Yung-Sheng Chiu ,  Ying Chen Chao

IPC分类号： C23C14/34

CPC分类号： C23C14/06 ,  C23C14/0047 ,  C23C14/0057 ,  C23C14/541 ,  C23C14/5806 ,  H01L21/02422 ,  H01L21/02491 ,  H01L21/02568 ,  H01L21/02628 ,  H01L31/0322 ,  H01L31/1836 ,  Y02E10/541 ,  Y02P70/521

摘要： A method and system for forming a chalcogenide or chalcopyrite-based semiconductor material provide for the simultaneous deposition of metal precursor materials from a target and Se radials from a Se radical generation system. The Se radical generation system includes an evaporator that produces an Se vapor and a plasma chamber that uses a plasma to generate a flux of Se radicals. Multiple such deposition operations may take place in sequence, each having the deposition temperature accurately controlled. The deposited material may include a compositional concentration gradient or may be a composite material, and may be used as an absorber layer in a solar cell.

摘要翻译： 用于形成硫族化物或黄铜矿基半导体材料的方法和系统提供了来自Se自由基产生系统的来自目标的金属前体材料和Se径向的同时沉积。 Se自由基生成系统包括产生Se蒸气的蒸发器和使用等离子体产生Se自由基流量的等离子体室。 可以依次进行多个这样的沉积操作，每个沉积操作具有精确控制的沉积温度。 沉积材料可以包括组成浓度梯度或者可以是复合材料，并且可以用作太阳能电池中的吸收层。

公开(公告)号：US20100250980A1

公开(公告)日：2010-09-30

申请号：US12413713

申请日：2009-03-30

申请人： Chao Chun Wang ,  Yung-Sheng Chiu ,  Ren-Yu Yu

发明人： Chao Chun Wang ,  Yung-Sheng Chiu ,  Ren-Yu Yu

IPC分类号： G06F1/32 ,  G06F12/00 ,  G06F12/02

CPC分类号： G06F1/3275 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14

摘要： A method for reducing power consumption of a device with an embedded memory module is provided. The device includes comprises a processor, an embedded memory module, a software module, a power supplying unit, and an auxiliary logic. The embedded memory module is accessed by the processor and partitioned into a plurality of memory blocks in accordance with a first predetermined rule. The software module comprises an instruction set and a data set. The software module is segmented into a plurality of segments in accordance with a second predetermined rule. The power supplying unit provides power to the plurality of memory blocks. The auxiliary logic controls the power supplying unit. The power supplied to a memory block is switched on or off in accordance with a condition.

摘要翻译： 提供了一种用于降低具有嵌入式存储器模块的设备的功耗的方法。 该设备包括处理器，嵌入式存储器模块，软件模块，供电单元和辅助逻辑。 嵌入式存储器模块由处理器访问，并且根据第一预定规则被划分成多个存储器块。 软件模块包括指令集和数据集。 根据第二预定规则，软件模块被分段成多个段。 供电单元向多个存储块供电。 辅助逻辑控制供电单元。 提供给存储器块的电源根据条件被打开或关闭。

公开(公告)号：US20090280632A1

公开(公告)日：2009-11-12

申请号：US12118919

申请日：2008-05-12

申请人： Cheng-Tung Lin ,  Yung-Sheng Chiu ,  Hsiang-Yi Wang ,  Chia-Lin Yu ,  Chen-Hua Yu

发明人： Cheng-Tung Lin ,  Yung-Sheng Chiu ,  Hsiang-Yi Wang ,  Chia-Lin Yu ,  Chen-Hua Yu

IPC分类号： H01L21/3205

CPC分类号： H01L21/28088 ,  H01L21/28079 ,  H01L21/28185 ,  H01L21/3141 ,  H01L21/823437 ,  H01L21/823828 ,  H01L29/513 ,  H01L29/517

摘要： MOSFETs having stacked metal gate electrodes and methods of making the same are provided. The MOSFET gate electrode includes a gate metal layer formed atop a high-k gate dielectric layer. The metal gate electrode is formed through a low oxygen content deposition process without charged-ion bombardment to the wafer substrate. Metal gate layer thus formed has low oxygen content and may prevent interfacial oxide layer regrowth. The process of forming the gate metal layer generally avoids plasma damage to the wafer substrate.

摘要翻译： 提供具有层叠金属栅电极的MOSFET及其制造方法。 MOSFET栅电极包括形成在高k栅极电介质层顶上的栅极金属层。 通过低氧含量沉积工艺形成金属栅电极而不对晶片衬底进行带电离子轰击。 如此形成的金属栅极层的氧含量低，并且可以防止界面氧化层再生长。 形成栅极金属层的过程通常避免了对晶片衬底的等离子体损伤。

公开(公告)号：US07947588B2

公开(公告)日：2011-05-24

申请号：US12424153

申请日：2009-04-15

申请人： Chen-Hua Yu ,  Cheng-Tung Lin ,  Hsiang-Yi Wang ,  Yung-Sheng Chiu ,  Chia-Lin Yu

发明人： Chen-Hua Yu ,  Cheng-Tung Lin ,  Hsiang-Yi Wang ,  Yung-Sheng Chiu ,  Chia-Lin Yu

IPC分类号： H01L21/4763

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconductor substrate; a high-k gate dielectric layer over the interfacial dielectric layer; and a doped-conducting metal oxide layer over the high-k gate dielectric layer.

摘要翻译： 公开了一种用于制造用于提供改进的功函数值和热稳定性的半导体器件的半导体器件和方法。 半导体器件包括半导体衬底; 半导体衬底上的界面介电层; 界面介电层上的高k栅介质层; 以及在高k栅极电介质层上方的掺杂导电金属氧化物层。

公开(公告)号：US20110117804A1

公开(公告)日：2011-05-19

申请号：US13012132

申请日：2011-01-24

申请人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

发明人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

IPC分类号： H01J9/26

CPC分类号： G02F1/1339

摘要： A display panel and a manufacture method thereof are provided. The display panel includes a first substrate, a second substrate, and a sealant. The first substrate has a top surface which includes a signal transmission module parallel to an edge of the top surface. The sealant is disposed on the top surface and parallel to the signal transmission module, which is disposed between the top surface and sealant. The sealant is made of a photo-curable material and includes an inner isolation wall, which is exposed via the signal transmission module. The second substrate is disposed on the sealant and includes an inner surface. A light-shielding structure is disposed on the inner surface and close to an edge of the inner surface. The sealant at least partially overlaps the light-shielding structure.

摘要翻译： 提供了一种显示面板及其制造方法。 显示面板包括第一基板，第二基板和密封剂。 第一基板具有顶表面，其包括平行于顶表面的边缘的信号传输模块。 密封剂设置在顶表面上并且平行于设置在顶表面和密封剂之间的信号传输模块。 密封剂由光固化材料制成，并且包括通过信号传输模块暴露的内隔离壁。 第二基板设置在密封剂上并且包括内表面。 遮光结构设置在内表面上且靠近内表面的边缘。 密封剂至少部分地与遮光结构重叠。

公开(公告)号：US07898634B2

公开(公告)日：2011-03-01

申请号：US12136324

申请日：2008-06-10

申请人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

发明人： Mei-Lien Huang ,  Shih-Yu Wang ,  Chung-Wei Liu ,  Yung-Sheng Chiu

IPC分类号： G02F1/1339

CPC分类号： G02F1/1339

摘要： A display panel and a manufacture method thereof are provided. The display panel includes a first substrate, a second substrate, and a sealant. The first substrate has a top surface which includes a signal transmission module parallel to an edge of the top surface. The sealant is disposed on the top surface and parallel to the signal transmission module, which is disposed between the top surface and sealant. The sealant is made of a photo-curable material and includes an inner isolation wall, which is exposed via the signal transmission module. The second substrate is disposed on the sealant and includes an inner surface. A light-shielding structure is disposed on the inner surface and close to an edge of the inner surface. The sealant at least partially overlaps the light-shielding structure.

摘要翻译： 提供了一种显示面板及其制造方法。 显示面板包括第一基板，第二基板和密封剂。 第一基板具有顶表面，其包括平行于顶表面的边缘的信号传输模块。 密封剂设置在顶表面上并且平行于设置在顶表面和密封剂之间的信号传输模块。 密封剂由光固化材料制成，并且包括通过信号传输模块暴露的内隔离壁。 第二基板设置在密封剂上并且包括内表面。 遮光结构设置在内表面上且靠近内表面的边缘。 密封剂至少部分地与遮光结构重叠。

公开(公告)号：US06762554B2

公开(公告)日：2004-07-13

申请号：US10079480

申请日：2002-02-22

申请人： Jwo-Huei Jou ,  Min-Der Lin ,  Yung-Sheng Chiu ,  Yen-Shih Huang ,  San-Bao Lin ,  Feng-Ju Chuang

发明人： Jwo-Huei Jou ,  Min-Der Lin ,  Yung-Sheng Chiu ,  Yen-Shih Huang ,  San-Bao Lin ,  Feng-Ju Chuang

IPC分类号： H01J6304

CPC分类号： C23C14/0021 ,  C23C14/082 ,  H01L51/5253 ,  H01L51/5259 ,  H01L51/56

摘要： The present invention discloses an electroluminescent device with a drying film and a method for fabricating the same. The present invention is characterized in that the method comprises: providing a substrate; forming, in sequence from substrate up, a transparent electrode, a luminescent layer, and an opposed electrode; and forming a drying film by providing a raw material composed of barium (Ba), magnesium (Mg) or calcium (Ca) to react with a gaseous reactant composed of oxygen on the surface of the opposed electrode. The drying film composed of barium oxide (BaO), magnesium oxide (MgO) or calcium oxide (CaO) can be employed to absorb the moisture. Therefore, the generation of dark spots can be prevented and the reliability of the device can be improved.

摘要翻译： 本发明公开了一种具有干燥膜的电致发光器件及其制造方法。 本发明的特征在于，所述方法包括：提供基板; 从衬底依次形成透明电极，发光层和相对电极; 通过提供由钡（Ba），镁（Mg）或钙（Ca）组成的原料与在相对电极的表面上由氧组成的气态反应物反应形成干燥膜。 可以使用由氧化钡（BaO），氧化镁（MgO）或氧化钙（CaO）组成的干燥膜来吸收水分。 因此，能够防止黑斑的产生，能够提高装置的可靠性。

公开(公告)号：US06627983B2

公开(公告)日：2003-09-30

申请号：US09770083

申请日：2001-01-24

申请人： Hsiu Wen Tu ,  Wen Chuan Chen ,  Mon Nan Ho ,  Li Huan Chen ,  Nai Hua Yeh ,  Yen Cheng Huang ,  Yung Sheng Chiu ,  Jichen Wu ,  Joe Liu ,  Wu Hsiang Lee

发明人： Hsiu Wen Tu ,  Wen Chuan Chen ,  Mon Nan Ho ,  Li Huan Chen ,  Nai Hua Yeh ,  Yen Cheng Huang ,  Yung Sheng Chiu ,  Jichen Wu ,  Joe Liu ,  Wu Hsiang Lee

IPC分类号： H01L2302

CPC分类号： H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/00014

摘要： A stacked package structure of an image sensor for electrically connecting to a printed circuit board includes a first substrate, a second substrate, an integrated circuit, an image sensing chip, and a transparent layer. The second substrate is mounted on the first substrate so as to a cavity formed between the first substrate and second substrate. The integrated circuit is located within the cavity and electrically connected the first substrate. The image-sensing chip is arranged on the second substrate. The transparent layer covers over the image sensing chip, wherein the image sensing chip receives image signals via the transparent layer and transforms the image signals into electrical signals transmitted to the first substrate. Thus, the image sensing chip of the image sensing product and the integrated circuit can be integrally package.