公开(公告)号：US06604853B2

公开(公告)日：2003-08-12

申请号：US09976995

申请日：2001-10-11

申请人： Ying-Chen Chao ,  Wi William Lee ,  Sen-Shan Yang ,  Keng-Hui Liao

发明人： Ying-Chen Chao ,  Wi William Lee ,  Sen-Shan Yang ,  Keng-Hui Liao

IPC分类号： G01N1700

CPC分类号： G01N3/60 ,  G01N2033/0095

摘要： An accelerated thermal stress cycle test which can be conducted in a significantly reduced test time compared to the conventional test is provided. The test is carried out in a cluster of reaction chambers that includes a CVD chamber and a cool-down chamber such that a pre-processed wafer can be heated from room temperature to at least 350° C. in an inert gas in about 2 min., and then cooled down to not higher than 70° C. in a cool-down chamber in less than 30 sec. The heating and cooling steps can be repeated between 3 and 7 times to reveal any defect formation caused by the thermal stress cycle test. Typical defects are metal film peeling from insulating dielectric material layer or void formation.

公开(公告)号：US5999397A

公开(公告)日：1999-12-07

申请号：US958531

申请日：1997-10-27

申请人： Ming-Fa Chen ,  Shih-Shiung Chen ,  Ying-Chen Chao

发明人： Ming-Fa Chen ,  Shih-Shiung Chen ,  Ying-Chen Chao

IPC分类号： G03F7/20 ,  H05F1/00

CPC分类号： G03F1/66 ,  G03F7/70741 ,  H05F1/00

摘要： The present invention discloses a method for preventing electrostatic discharge damages to an article that is made of an insulating material and stored in a container also made of an insulating material by maintaining a minimum safe distance between the article and the top lid of the container such that a saturation electric field cannot be reached at such safety distance and thus electrostatic discharge does not occur. The present invention novel method can be utilized in carrying any insulating articles but is particularly suitable for carrying a quartz reticle in a polycarbonate pod.

摘要翻译： 本发明公开了一种防止对由绝缘材料制成的物品的静电放电损坏的方法，并且通过保持物品与容器顶盖之间的最小安全距离而将其储存在也由绝缘材料制成的容器中，使得 在这样的安全距离处不能达到饱和电场，因此不会发生静电放电。 本发明的新颖方法可用于承载任何绝缘制品，但特别适用于在聚碳酸酯荚中承载石英掩模版。

公开(公告)号：US5726497A

公开(公告)日：1998-03-10

申请号：US627842

申请日：1996-04-03

申请人： Ying-Chen Chao ,  Ting-Hwang Lin ,  Jin-Yuan Lee

发明人： Ying-Chen Chao ,  Ting-Hwang Lin ,  Jin-Yuan Lee

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/52 ,  B32B9/04 ,  B32B15/04 ,  H01L29/12

CPC分类号： H01L23/53223 ,  H01L21/76877 ,  H01L23/5226 ,  H01L2924/0002 ,  Y10S257/915 ,  Y10T428/12736 ,  Y10T428/12806 ,  Y10T428/26

摘要： A method of manufacture of a semiconductor device on a silicon semiconductor substrate comprises formation of a first stress layer on the semiconductor substrate, formation of an interconnect layer over the first stress layer, formation of a second stress layer on the interconnect layer, formation of an inter-metal dielectric (IMD) layer over the second stress layer, patterning and etching a via opening through the inter-metal dielectric layer and the second stress layer exposing a contact area on the surface of the metal interconnect layer, and heating the device at a temperature sufficient to squeeze the metal interconnect layer up into the via.

摘要翻译： 一种在硅半导体衬底上制造半导体器件的方法包括在半导体衬底上形成第一应力层，在第一应力层上形成互连层，在互连层上形成第二应力层，形成 在第二应力层上的金属间电介质（IMD）层，图案化和蚀刻通过金属间介电层的通孔开口和暴露金属互连层表面上的接触区域的第二应力层， 足以将金属互连层挤压到通孔中的温度。

公开(公告)号：US5693976A

公开(公告)日：1997-12-02

申请号：US720265

申请日：1996-09-26

申请人： Ying-Chen Chao

发明人： Ying-Chen Chao

IPC分类号： H01L21/8238 ,  H01L21/84 ,  H01L29/80 ,  H01L23/58 ,  H01L29/76

CPC分类号： H01L21/84 ,  H01L21/823871 ,  H01L21/823878 ,  H01L2924/0002 ,  Y10S148/024

摘要： A process for fabricating MOSFET devices, in which a denuded zone in silicon has been created during the normal process sequence, has been developed. In order to avoid the formation of deleterious oxygen precipitates, prior to the creation of the denuded zone, low temperature processing had to be used. Low temperature insulator depositions were used for the alignment mark formation, as well as for the fill for the field oxide regions. Subsequently, high temperature well formation activation anneals, resulted in the creation of the denuded zone, and thus removed the low temperature restriction for the remaining processing steps.

摘要翻译： 已经开发了用于制造其中在正常工艺序列期间已经形成硅中的裸露区域的MOSFET器件的工艺。 为了避免有害的氧沉淀物的形成，在形成剥离区之前，必须使用低温处理。 低温绝缘体沉积用于对准标记形成，以及用于场氧化物区域的填充。 随后，高温井形成激活退火，导致形成剥离区，从而消除了剩余加工步骤的低温限制。

公开(公告)号：US5385868A

公开(公告)日：1995-01-31

申请号：US270668

申请日：1994-07-05

申请人： Ying-Chen Chao ,  Ting-Hwang Lin ,  Jin-Yuan Lee

发明人： Ying-Chen Chao ,  Ting-Hwang Lin ,  Jin-Yuan Lee

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/44 ,  H01L21/48

CPC分类号： H01L23/53223 ,  H01L21/76877 ,  H01L23/5226 ,  H01L2924/0002 ,  Y10S257/915 ,  Y10T428/12736 ,  Y10T428/12806 ,  Y10T428/26

摘要： A method of manufacture of a semiconductor device on a silicon semiconductor substrate comprises formation of a first stress layer on the semiconductor substrate, formation of an interconnect layer over the first stress layer, formation of a second stress layer on the interconnect layer, formation of an inter-metal dielectric (IMD) layer over the second stress layer, patterning and etching a via opening through the inter-metal dielectric layer and the second stress layer exposing a contact area on the surface of the metal interconnect layer, and heating the device at a temperature sufficient to squeeze the metal interconnect layer up into the via.

摘要翻译： 一种在硅半导体衬底上制造半导体器件的方法包括在半导体衬底上形成第一应力层，在第一应力层上形成互连层，在互连层上形成第二应力层，形成 在第二应力层上的金属间电介质（IMD）层，图案化和蚀刻通过金属间介电层的通孔开口和暴露金属互连层表面上的接触区域的第二应力层， 足以将金属互连层挤压到通孔中的温度。

公开(公告)号：US5989754A

公开(公告)日：1999-11-23

申请号：US923980

申请日：1997-09-05

申请人： Shih-Shiung Chen ,  Ming-Fa Chen ,  Ho-Ku Lan ,  Ying-Chen Chao

发明人： Shih-Shiung Chen ,  Ming-Fa Chen ,  Ho-Ku Lan ,  Ying-Chen Chao

IPC分类号： G03F1/00 ,  G03F1/40 ,  G03F9/00

CPC分类号： G03F1/40

摘要： A photomask arrangement is disclosed to prevent the reticle patterns of a photomask from peeling caused by electrostatic discharge damage. The photomask includes: a substrate; a plurality of metal shielding layers formed on the surface of the substrate to provide the reticle patterns, wherein each two of the metal shielding layers are spaced apart by a clear scribe line; and a plurality of metal lines formed on the clear scribe line to connect the adjacent metal shielding layers, thereby increasing the effective surface area of the reticle patterns.

摘要翻译： 公开了一种光掩模布置，以防止光掩模的掩模版图案由静电放电损坏引起的剥离。 光掩模包括：基底; 形成在所述基板表面上的多个金属屏蔽层，以提供所述标线图案，其中每个所述金属屏蔽层通过清晰的划线间隔开; 以及形成在清晰划线上的多条金属线，以连接相邻的金属屏蔽层，从而增加标线图案的有效表面积。

公开(公告)号：US5674357A

公开(公告)日：1997-10-07

申请号：US521454

申请日：1995-08-30

申请人： Yi-Lin Sun ,  Ying-Chen Chao

发明人： Yi-Lin Sun ,  Ying-Chen Chao

IPC分类号： H01L21/02 ,  H01L21/306 ,  H01L21/3213 ,  H01L21/302

CPC分类号： H01L21/02054 ,  H01L21/02071

摘要： A method for removing particulate residues from semiconductor substrates. A semiconductor substrate is provided which has upon its surface a particulate residue. At minimum, either the semiconductor substrate or the particulate residue is susceptible to oxidation upon exposure to an oxygen containing plasma. The semiconductor substrate and the particulate residue are exposed to an oxygen plasma. The particulates are then rinsed from the surface of the semiconductor substrate with deionized water.

摘要翻译： 一种从半导体衬底去除微粒残留物的方法。 提供半导体衬底，其表面上具有颗粒残留物。 至少，半导体衬底或颗粒残留物在暴露于含氧等离子体时易于氧化。 将半导体衬底和颗粒残余物暴露于氧等离子体。 然后用去离子水从颗粒表面漂洗微粒。

公开(公告)号：US5668401A

公开(公告)日：1997-09-16

申请号：US697705

申请日：1996-08-27

申请人： Ying Chen Chao ,  Chih-Heng Shen

发明人： Ying Chen Chao ,  Chih-Heng Shen

IPC分类号： G03F7/16 ,  H01L21/027 ,  H01L21/301 ,  H01L21/78 ,  H01L23/60 ,  H01L23/48

CPC分类号： H01L21/7806 ,  G03F7/16 ,  H01L21/0271 ,  H01L2924/0002 ,  Y10S438/941

摘要： A process has been developed in which photoresist thinning at the edges of silicon chips, resulting from photoresist flowing from semiconductor chips, exhibiting features with raised topographies, to flat scribe regions, has been reduced. The reduction in photoresist flowing has been accomplished by creating a chessboard pattern of raised insulator and metal features, in the scribe line region, thus reducing the differences in topography between the scribe line and chip regions. The areas between the raised mesas, in the scribe line regions, are used for laser or optical endpoint detection of RIE processes.

摘要翻译： 已经开发出了一种工艺，其中由硅片流过半导体芯片的光致抗蚀剂的薄膜在表面上显现出特征，形成平面划线区域，已经减少了。 光刻胶流动的减少已经通过在切割线区域中产生凸起的绝缘体和金属特征的棋盘图案来实现，从而减少划线和芯片区域之间的形貌差异。 在划线区域中的凸起的台面之间的区域用于RIE过程的激光或光学终点检测。

公开(公告)号：US5591673A

公开(公告)日：1997-01-07

申请号：US498356

申请日：1995-07-05

申请人： Ying-Chen Chao ,  Chih-Heng Shen ,  Yi-Dong Yan

发明人： Ying-Chen Chao ,  Chih-Heng Shen ,  Yi-Dong Yan

IPC分类号： H01L21/311 ,  H01L21/768 ,  H01L21/283 ,  H01L21/302

CPC分类号： H01L21/76877 ,  H01L21/31116

摘要： A tungsten stud, stacked via process, has been developed, featuring smooth planar topographies at all metal levels. The desirable topography is obtained by allowing the tungsten stud to reside at the same level, or slightly above the level, of the top surface of the via hole insulator. This is achieved via an insulator etch back procedure, performed after metal stud formation.

摘要翻译： 已经开发了一种钨丝螺柱，堆叠过程，在所有金属水平上都具有平滑的平面形貌。 通过使钨螺柱位于通孔绝缘体的顶表面的相同水平或略高于水平面的位置获得所需的形貌。 这通过绝缘体回蚀程序实现，在金属螺柱形成之后进行。

公开(公告)号：US20130210190A1

公开(公告)日：2013-08-15

申请号：US13486079

申请日：2012-06-01

申请人： Edward TENG ,  Ying-Chen CHAO ,  Chih-Jen YANG ,  Kuo-Jui HSIAO

发明人： Edward TENG ,  Ying-Chen CHAO ,  Chih-Jen YANG ,  Kuo-Jui HSIAO

IPC分类号： H01L31/18 ,  C23C14/34

CPC分类号： H01L31/18 ,  C23C14/0623 ,  C23C14/185 ,  C23C14/24 ,  C23C14/3464 ,  C23C14/505 ,  H01L21/02104 ,  H01L21/02631 ,  H01L21/28194 ,  H01L21/67011 ,  H01L21/67155 ,  H01L31/0322 ,  H01L31/0326 ,  Y02E10/541 ,  Y02P70/521

摘要： A method and apparatus for forming a solar cell. The apparatus includes a housing defining a vacuum chamber and a rotatable substrate apparatus configured to hold a plurality of substrates on a plurality of surfaces wherein each of the plurality of surfaces are disposed facing an interior surface of the vacuum chamber. A first sputtering source is configured to deposit a plurality of absorber layer atoms of a first type over at least a portion of a surface of each one of the plurality of substrates. An evaporation source is disposed in a first subchamber of the vacuum chamber and configured to deposit a plurality of absorber layer atoms of a second type over at least a portion of the surface of each one of the plurality of substrates. A first isolation source is configured to isolate the evaporation source from the first sputtering source.

摘要翻译： 一种用于形成太阳能电池的方法和装置。 该装置包括限定真空室的壳体和被配置为将多个基板保持在多个表面上的可旋转基板装置，其中多个表面中的每一个面向真空室的内表面设置。 第一溅射源被配置为在多个基板中的每个基板的表面的至少一部分上沉积第一类型的多个吸收层原子。 蒸发源设置在真空室的第一子室中并且被配置为在多个基板中的每一个的表面的至少一部分上沉积第二类型的多个吸收层原子。 第一隔离源被配置为将蒸发源与第一溅射源隔离。