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    Mask and method for forming the same
    1.
    发明授权
    Mask and method for forming the same 有权
    面具及其形成方法

    公开(公告)号：US08974988B2

    公开(公告)日：2015-03-10

    申请号：US13451767

    申请日：2012-04-20

    申请人： Yun-Yue Lin ,  Ta-Cheng Lien ,  Hsin-Chang Lee ,  Anthony Yen ,  Chia-Jen Chen

    发明人： Yun-Yue Lin ,  Ta-Cheng Lien ,  Hsin-Chang Lee ,  Anthony Yen ,  Chia-Jen Chen

    IPC分类号： G03F1/48

    CPC分类号： G03F1/48 ,  G03F1/22 ,  G03F1/26 ,  G03F1/30 ,  G03F1/32 ,  G03F1/50

    摘要： A photomask includes a low thermal expansion material (LTEM) substrate, a patterned opaque layer over the LTEM substrate, and a patterned capping layer over the opaque layer. The patterned capping layer includes a transition metal material for suppressing haze growth, such as metal oxide, metal nitride, or metal oxynitride. The material in the capping layer reacts with a hydrogenic compound from a lithography environment to for an atomic level hydrogen passivation layer. The passivation layer has superior ability to suppress photo-induced haze defect growth on the photomask surface, to improve production cycle time and reduce the production cost.

    摘要翻译： 光掩模包括低热膨胀材料（LTEM）衬底，在LTEM衬底上的图案化不透明层，以及在不透明层上的图案化覆盖层。 图案化覆盖层包括用于抑制雾度生长的过渡金属材料，例如金属氧化物，金属氮化物或金属氮氧化物。 覆盖层中的材料与来自光刻环境的氢化合物与原子级氢钝化层反应。 钝化层在光掩模表面上具有优异的抑制光致霾缺陷生长的能力，提高生产周期时间，降低生产成本。

    Memory array of floating gate-based non-volatile memory cells
    3.
    发明授权
    Memory array of floating gate-based non-volatile memory cells 有权

    公开(公告)号：US08315100B2

    公开(公告)日：2012-11-20

    申请号：US13012381

    申请日：2011-01-24

    申请人： Hosam Haggag ,  Alexander Kalnitsky ,  Edgardo Laber ,  Michael D. Church ,  Yun Yue

    发明人： Hosam Haggag ,  Alexander Kalnitsky ,  Edgardo Laber ,  Michael D. Church ,  Yun Yue

    IPC分类号： G11C16/06 ,  G11C16/26 ,  G11C16/34 ,  G11C16/04

    CPC分类号： G11C16/0433

    摘要： A memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a high voltage access transistor, a floating gate memory transistor electrically connected to the access transistor, and a coupling capacitor electrically connected to the memory transistor. A first set of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A second set of word lines are each electrically connected to the access transistor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the access transistor in each of the memory cells in a respective column. A second set of bit lines are each electrically connected to the memory transistor in each of the memory cells in a respective column. Various combinations of voltages can be applied to the word lines and bit lines in operations to program, erase, read, or inhibit a logic state stored by the memory transistor in one or more of the memory cells.

    Memory array of floating gate-based non-volatile memory cells
    4.
    发明授权
    Memory array of floating gate-based non-volatile memory cells 有权

    公开(公告)号：US08218370B2

    公开(公告)日：2012-07-10

    申请号：US13012368

    申请日：2011-01-24

    申请人： Hosam Haggag ,  Alexander Kalnitsky ,  Edgardo Laber ,  Michael D. Church ,  Yun Yue

    发明人： Hosam Haggag ,  Alexander Kalnitsky ,  Edgardo Laber ,  Michael D. Church ,  Yun Yue

    IPC分类号： G11C16/14 ,  G11C16/10 ,  G11C16/08 ,  G11C16/24 ,  G11C16/06 ,  G11C16/04

    CPC分类号： G11C16/0433

    摘要： A memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a high voltage access transistor, a floating gate memory transistor electrically connected to the access transistor, and a coupling capacitor electrically connected to the memory transistor. A first set of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A second set of word lines are each electrically connected to the access transistor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the access transistor in each of the memory cells in a respective column. A second set of bit lines are each electrically connected to the memory transistor in each of the memory cells in a respective column. Various combinations of voltages can be applied to the word lines and bit lines in operations to program, erase, read, or inhibit a logic state stored by the memory transistor in one or more of the memory cells.

    Solar cell having tree-like nanostructure and method for preparing the same
    5.
    发明授权
    Solar cell having tree-like nanostructure and method for preparing the same 有权
    具有树状纳米结构的太阳能电池及其制备方法

    公开(公告)号：US08198531B2

    公开(公告)日：2012-06-12

    申请号：US12106414

    申请日：2008-04-21

    申请人： Wei-Fan Su ,  Chun-Wei Chen ,  Jih-Jen Wu ,  Yun-Yue Lin

    发明人： Wei-Fan Su ,  Chun-Wei Chen ,  Jih-Jen Wu ,  Yun-Yue Lin

    IPC分类号： H02N6/00 ,  H01L31/042 ,  H01L31/00

    CPC分类号： H01L31/022433 ,  H01G9/2036 ,  H01L31/04 ,  H01L31/18 ,  H01L51/0036 ,  H01L51/4226 ,  H01L51/4233 ,  H01L51/4266 ,  Y02E10/549

    摘要： The present invention discloses a solar cell having a multi-layered structure that is used to generate, transport, and collect electric charges. The multi-layered nanostructure comprises a cathode, a conducting metal layer, a photo-active layer, a hole-transport layer, and an anode. The photo-active layer comprises a tree-like nanostructure array and a conjugate polymer filler. The tree-like nanostructure array is used as an electron acceptor while the conjugate polymer filler is as an electron donor. The tree-like nanostructure array comprises a trunk part and a branch part. The trunk part is formed in-situ on the surface of the conducting metal layer and is used to provide a long straight transport pathway to transport electrons. The large contact area between the branch part and the conjugate polymer filler provides electron-hole separation.

    摘要翻译： 本发明公开了一种具有多层结构的太阳能电池，其用于产生，运送和收集电荷。 多层纳米结构包括阴极，导电金属层，光活性层，空穴传输层和阳极。 光活性层包括树状纳米结构阵列和共轭聚合物填料。 树状纳米结构阵列用作电子受体，而共轭聚合​​物填料是电子给体。 树状纳米结构阵列包括树干部分和分支部分。 主体部分在导电金属层的表面上原地形成，并且用于提供长的输送电子的直线输送路径。 分支部分和共轭聚合物填料之间的大的接触面积提供电子 - 空穴分离。

    MEMORY ARRAY OF FLOATING GATE-BASED NON-VOLATILE MEMORY CELLS
    7.
    发明申请
    MEMORY ARRAY OF FLOATING GATE-BASED NON-VOLATILE MEMORY CELLS 有权

    公开(公告)号：US20110116318A1

    公开(公告)日：2011-05-19

    申请号：US13012361

    申请日：2011-01-24

    申请人： Hosam Haggag ,  Alexander Kalnitsky ,  Edgardo Laber ,  Michael D. Church ,  Yun Yue

    发明人： Hosam Haggag ,  Alexander Kalnitsky ,  Edgardo Laber ,  Michael D. Church ,  Yun Yue

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0433

    摘要： A memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a high voltage access transistor, a floating gate memory transistor electrically connected to the access transistor, and a coupling capacitor electrically connected to the memory transistor. A first set of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A second set of word lines are each electrically connected to the access transistor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the access transistor in each of the memory cells in a respective column. A second set of bit lines are each electrically connected to the memory transistor in each of the memory cells in a respective column. Various combinations of voltages can be applied to the word lines and bit lines in operations to program, erase, read, or inhibit a logic state stored by the memory transistor in one or more of the memory cells.

    Method for forming a photo-active layer of the solar cell
    8.
    发明授权
    Method for forming a photo-active layer of the solar cell 有权
    形成太阳能电池的光活性层的方法

    公开(公告)号：US09287422B2

    公开(公告)日：2016-03-15

    申请号：US13456762

    申请日：2012-04-26

    申请人： Wei-Fang Su ,  Chun-Wei Chen ,  Jih-Jen Wu ,  Yun-Yue Lin

    发明人： Wei-Fang Su ,  Chun-Wei Chen ,  Jih-Jen Wu ,  Yun-Yue Lin

    IPC分类号： H01L31/04 ,  H01L31/0224 ,  H01L31/18 ,  H01L51/42 ,  H01G9/20 ,  H01L51/00

    CPC分类号： H01L31/022433 ,  H01G9/2036 ,  H01L31/04 ,  H01L31/18 ,  H01L51/0036 ,  H01L51/4226 ,  H01L51/4233 ,  H01L51/4266 ,  Y02E10/549

    摘要： The present invention discloses a solar cell having a multi-layered structure that is used to generate, transport, and collect electric charges. The multi-layered nanostructure comprises a cathode, a conducting metal layer, a photo-active layer, a hole-transport layer, and an anode. The photo-active layer comprises a tree-like nanostructure array and a conjugate polymer filler. The tree-like nanostructure array is used as an electron acceptor while the conjugate polymer filler is as an electron donor. The tree-like nanostructure array comprises a trunk part and a branch part. The trunk part is formed in-situ on the surface of the conducting metal layer and is used to provide a long straight transport pathway to transport electrons. The large contact area between the branch part and the conjugate polymer filler provides electron-hole separation.

    摘要翻译： 本发明公开了一种具有多层结构的太阳能电池，其用于产生，运送和收集电荷。 多层纳米结构包括阴极，导电金属层，光活性层，空穴传输层和阳极。 光活性层包括树状纳米结构阵列和共轭聚合物填料。 树状纳米结构阵列用作电子受体，而共轭聚合​​物填料是电子给体。 树状纳米结构阵列包括树干部分和分支部分。 主体部分在导电金属层的表面上原地形成，并且用于提供长的输送电子的直线输送路径。 分支部分和共轭聚合物填料之间的大的接触面积提供电子 - 空穴分离。

    METHOD OF MAKING A LITHOGRAPHY MASK
    9.
    发明申请
    METHOD OF MAKING A LITHOGRAPHY MASK 审中-公开
    制作光刻面膜的方法

    公开(公告)号：US20130260289A1

    公开(公告)日：2013-10-03

    申请号：US13437565

    申请日：2012-04-02

    申请人： Yun-Yue Lin ,  Hsin-Chang Lee ,  Chia-Jen Chen ,  Ta-Cheng Lien ,  Anthony Yen

    发明人： Yun-Yue Lin ,  Hsin-Chang Lee ,  Chia-Jen Chen ,  Ta-Cheng Lien ,  Anthony Yen

    IPC分类号： G03F1/78 ,  B82Y40/00

    CPC分类号： B82Y10/00 ,  B82Y40/00 ,  G03F1/50 ,  G03F1/68 ,  G03F1/78

    摘要： A method of fabricating a lithography mask with carbon-based-charging-dissipation (CBCD) layer is disclosed. The method includes providing a substrate, depositing an opaque layer on the substrate, coating a photoresist and depositing a charging dissipation layer on the photoresist. The photoresist is patterned by an electron-beam writing. The CBCD layer is removed during developing the photoresist.

    摘要翻译： 公开了一种制造具有碳基带电耗散（CBCD）层的光刻掩模的方法。 该方法包括提供衬底，在衬底上沉积不透明层，涂覆光致抗蚀剂并在光致抗蚀剂上沉积充电耗散层。 光刻胶通过电子束写入进行图案化。 在显影光致抗蚀剂期间去除CBCD层。

    Photo-active layer of a multi-layered structure within a solar cell
    10.
    发明授权
    Photo-active layer of a multi-layered structure within a solar cell 有权
    太阳能电池内的多层结构的光活性层

    公开(公告)号：US08502068B2

    公开(公告)日：2013-08-06

    申请号：US13457013

    申请日：2012-04-26

    申请人： Wei-Fang Su ,  Chun-Wei Chen ,  Jih-Jen Wu ,  Yun-Yue Lin

    发明人： Wei-Fang Su ,  Chun-Wei Chen ,  Jih-Jen Wu ,  Yun-Yue Lin

    IPC分类号： H01L31/00

    CPC分类号： H01L31/022433 ,  H01G9/2036 ,  H01L31/04 ,  H01L31/18 ,  H01L51/0036 ,  H01L51/4226 ,  H01L51/4233 ,  H01L51/4266 ,  Y02E10/549

    摘要： The present invention discloses a solar cell having a multi-layered structure that is used to generate, transport, and collect electric charges. The multi-layered nanostructure comprises a cathode, a conducting metal layer, a photo-active layer, a hole-transport layer, and an anode. The photo-active layer comprises a tree-like nanostructure array and a conjugate polymer filler. The tree-like nanostructure array is used as an electron acceptor while the conjugate polymer filler is as an electron donor. The tree-like nanostructure array comprises a trunk part and a branch part. The trunk part is formed in-situ on the surface of the conducting metal layer and is used to provide a long straight transport pathway to transport electrons. The large contact area between the branch part and the conjugate polymer filler provides electron-hole separation.

    摘要翻译： 本发明公开了一种具有多层结构的太阳能电池，其用于产生，运送和收集电荷。 多层纳米结构包括阴极，导电金属层，光活性层，空穴传输层和阳极。 光活性层包括树状纳米结构阵列和共轭聚合物填料。 树状纳米结构阵列用作电子受体，而共轭聚合​​物填料是电子给体。 树状纳米结构阵列包括树干部分和分支部分。 主体部分在导电金属层的表面上原地形成，并且用于提供长的输送电子的直线输送路径。 分支部分和共轭聚合物填料之间的大的接触面积提供电子 - 空穴分离。