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    Lead frame based semiconductor device with routing substrate
    1.
    发明授权
    Lead frame based semiconductor device with routing substrate 有权
    引线框架半导体器件与布线衬底

    公开(公告)号：US08980690B1

    公开(公告)日：2015-03-17

    申请号：US14462565

    申请日：2014-08-19

    申请人： Penglin Mei ,  You Ge ,  Meng Kong Lye

    发明人： Penglin Mei ,  You Ge ,  Meng Kong Lye

    IPC分类号： H01L21/44 ,  H01L23/495

    CPC分类号： H01L23/49541 ,  H01L21/568 ,  H01L23/49531 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665

    摘要： A semiconductor device including a lead frame, a routing substrate disposed within the lead frame, and an active component mounted on the routing substrate. The active component has a plurality of die pads. The routing substrate includes a set of first bond pads, a set of second bond pads, and interconnections, where each interconnection provides an electrical connection between a first bond pad and a corresponding second bond pad. The semiconductor device further includes electrical couplings between one or more of die pads of the active component and corresponding first bond pads of the routing substrate, as well as electrical couplings between leads of the lead frame and respective second bond pads of the routing substrate.

    摘要翻译： 一种半导体器件，包括引线框架，布置在引线框架内的布线基板以及安装在布线基板上的有源部件。 有源部件具有多个管芯焊盘。 路由衬底包括一组第一接合焊盘，一组第二接合焊盘和互连，其中每个互连提供第一接合焊盘和相应的第二接合焊盘之间的电连接。 该半导体器件还包括在有源部件的一个或多个管芯焊盘和布线衬底的对应的第一焊盘之间的电耦合，以及引线框架的引线与布线衬底的相应的第二接合焊盘之间的电耦合。

    SEMICONDUCTOR DEVICE WITH STAGGERED LEADS
    2.
    发明申请
    SEMICONDUCTOR DEVICE WITH STAGGERED LEADS 有权
    具有突破性领导的半导体器件

    公开(公告)号：US20120286406A1

    公开(公告)日：2012-11-15

    申请号：US13461801

    申请日：2012-05-02

    申请人： Shunan QIU ,  Zhigang Bai ,  Xuesong Xu ,  Beiyue Yan ,  You Ge

    发明人： Shunan QIU ,  Zhigang Bai ,  Xuesong Xu ,  Beiyue Yan ,  You Ge

    IPC分类号： H01L23/495 ,  H01L21/00

    CPC分类号： H01L23/49555 ,  H01L21/4842 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch.

    摘要翻译： 一种用于组装半导体器件的方法包括提供具有天然平面的引线框架和具有天然引线间距的多个引线。 该过程包括修剪和形成多个引线的第一子集以提供第一行引线。 该过程包括修剪和形成多个引线的第二子集以提供第二排引线。 引线的至少一个子集以相对于天平平面的钝角形成，使得与引线的第一或第二子集相关联的引线间距大于原始引线间距。

    Semiconductor device with integral heat sink
    4.
    发明授权
    Semiconductor device with integral heat sink 有权
    具有集成散热器的半导体器件

    公开(公告)号：US08901722B2

    公开(公告)日：2014-12-02

    申请号：US14077205

    申请日：2013-11-11

    申请人： You Ge ,  Meng Kong Lye ,  Penglin Mei

    发明人： You Ge ,  Meng Kong Lye ,  Penglin Mei

    IPC分类号： H01L23/34 ,  H01L21/48

    CPC分类号： H01L23/34 ,  H01L21/4842 ,  H01L21/4878 ,  H01L23/3677 ,  H01L23/49568 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A packaged semiconductor device has opposing first and second main surfaces and a sidewall connecting the first and second main surfaces. A semiconductor die is embedded in the package and has a first main surface facing the first main surface of the package and an opposing second main surface facing the second main surface of the package. Conductive leads are electrically coupled to the semiconductor die, each of which is partially embedded within the package and extends outside of the package from the package sidewall. At least one tie bar is partially embedded within the package and has an exposed segment extending outside of the package from the sidewall. A portion of the exposed segment is in contact with the first main surface of the package. The tie bar forms a heat sink to dissipate heat generated by the semiconductor die.

    摘要翻译： 封装的半导体器件具有相对的第一和第二主表面以及连接第一和第二主表面的侧壁。 半导体管芯被嵌入在封装中并且具有面向封装的第一主表面的第一主表面和面向封装的第二主表面的相对的第二主表面。 导电引线电耦合到半导体管芯，每个管芯部分地嵌入在封装内并且从封装侧壁延伸到封装的外部。 至少一个连杆部分地嵌入在包装内，并且具有从侧壁延伸到包装外部的暴露部分。 暴露段的一部分与包装的第一主表面接触。 连接杆形成散热器以散发由半导体管芯产生的热量。

    SEMICONDUCTOR PACKAGE WITH STRESS RELIEF AND HEAT SPREADER
    6.
    发明申请
    SEMICONDUCTOR PACKAGE WITH STRESS RELIEF AND HEAT SPREADER 有权
    具有应力消除和散热器的半导体封装

    公开(公告)号：US20150084169A1

    公开(公告)日：2015-03-26

    申请号：US14277801

    申请日：2014-05-15

    申请人： Kai Yun Yow ,  Poh Leng Eu ,  Meng Kong Lye ,  You Ge ,  Penglin Mei

    发明人： Kai Yun Yow ,  Poh Leng Eu ,  Meng Kong Lye ,  You Ge ,  Penglin Mei

    IPC分类号： H01L23/495 ,  H01L23/34

    CPC分类号： H01L23/49568 ,  H01L23/49503 ,  H01L23/49551 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48471 ,  H01L2924/00014 ,  H01L2224/4554

    摘要： A semiconductor device has a die mounted on a die paddle that is elevated above and thermally connected via tie bars to a heat sink structure. Heat generated by the die flows from the die to the die paddle to the tie bars to the heat sink structure and then to either the external environment or to an external heat sink. By elevating the die/paddle sub-assembly above the heat sink structure, the packaged device is less susceptible to delamination between the die and die attach adhesive and/or the die attach adhesive and the die paddle. An optional heat sink ring can surround the die paddle.

    摘要翻译： 半导体器件具有安装在芯片上的管芯，其上升并且经由连接杆热连接到散热器结构。 由模具产生的热量从模具流到模具板到连接杆到散热器结构，然后流到外部环境或外部散热器。 通过将模具/桨叶子组件提升到散热器结构上方，封装的装置不易受到管芯和管芯附接粘合剂和/或管芯附接粘合剂和管芯焊盘之间的分层的影响。 可选的散热片环可围绕裸片。

    SEMICONDUCTOR DEVICE WITH INTEGRAL HEAT SINK
    7.
    发明申请
    SEMICONDUCTOR DEVICE WITH INTEGRAL HEAT SINK 有权
    具有整体散热的半导体器件

    公开(公告)号：US20140239476A1

    公开(公告)日：2014-08-28

    申请号：US14077205

    申请日：2013-11-11

    申请人： You Ge ,  Meng Kong Lye ,  Penglin Mei

    发明人： You Ge ,  Meng Kong Lye ,  Penglin Mei

    IPC分类号： H01L23/34 ,  H01L21/48

    CPC分类号： H01L23/34 ,  H01L21/4842 ,  H01L21/4878 ,  H01L23/3677 ,  H01L23/49568 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A packaged semiconductor device has opposing first and second main surfaces and a sidewall connecting the first and second main surfaces. A semiconductor die is embedded in the package and has a first main surface facing the first main surface of the package and an opposing second main surface facing the second main surface of the package. Conductive leads are electrically coupled to the semiconductor die, each of which is partially embedded within the package and extends outside of the package from the package sidewall. At least one tie bar is partially embedded within the package and has an exposed segment extending outside of the package from the sidewall. A portion of the exposed segment is in contact with the first main surface of the package. The tie bar forms a heat sink to dissipate heat generated by the semiconductor die.

    摘要翻译： 封装的半导体器件具有相对的第一和第二主表面以及连接第一和第二主表面的侧壁。 半导体管芯被嵌入在封装中并且具有面向封装的第一主表面的第一主表面和面向封装的第二主表面的相对的第二主表面。 导电引线电耦合到半导体管芯，每个管芯部分地嵌入在封装内并且从封装侧壁延伸到封装的外部。 至少一个连杆部分地嵌入在包装内，并且具有从侧壁延伸到包装外部的暴露部分。 暴露段的一部分与包装的第一主表面接触。 连接杆形成散热器以散发由半导体管芯产生的热量。

    Semiconductor device with staggered leads
    8.
    发明授权
    Semiconductor device with staggered leads 有权
    具有交错引线的半导体器件

    公开(公告)号：US08643153B2

    公开(公告)日：2014-02-04

    申请号：US13461801

    申请日：2012-05-02

    申请人： Shunan Qiu ,  Zhigang Bai ,  Xuesong Xu ,  Beiyue Yan ,  You Ge

    发明人： Shunan Qiu ,  Zhigang Bai ,  Xuesong Xu ,  Beiyue Yan ,  You Ge

    IPC分类号： H01L23/495 ,  H01L23/48

    CPC分类号： H01L23/49555 ,  H01L21/4842 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch.

    摘要翻译： 一种用于组装半导体器件的方法包括提供具有天然平面的引线框架和具有天然引线间距的多个引线。 该过程包括修剪和形成多个引线的第一子集以提供第一行引线。 该过程包括修剪和形成多个引线的第二子集以提供第二排引线。 引线的至少一个子集以相对于天平平面的钝角形成，使得与引线的第一或第二子集相关联的引线间距大于原始引线间距。

    Semiconductor package with stress relief and heat spreader
    9.
    发明授权
    Semiconductor package with stress relief and heat spreader 有权
    具有应力消除和散热器的半导体封装

    公开(公告)号：US09196576B2

    公开(公告)日：2015-11-24

    申请号：US14277801

    申请日：2014-05-15

    申请人： Kai Yun Yow ,  Poh Leng Eu ,  Meng Kong Lye ,  You Ge ,  Penglin Mei

    发明人： Kai Yun Yow ,  Poh Leng Eu ,  Meng Kong Lye ,  You Ge ,  Penglin Mei

    IPC分类号： H01L23/495 ,  H01L23/34

    CPC分类号： H01L23/49568 ,  H01L23/49503 ,  H01L23/49551 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48471 ,  H01L2924/00014 ,  H01L2224/4554

    摘要： A semiconductor device has a die mounted on a die paddle that is elevated above and thermally connected via tie bars to a heat sink structure. Heat generated by the die flows from the die to the die paddle to the tie bars to the heat sink structure and then to either the external environment or to an external heat sink. By elevating the die/paddle sub-assembly above the heat sink structure, the packaged device is less susceptible to delamination between the die and die attach adhesive and/or the die attach adhesive and the die paddle. An optional heat sink ring can surround the die paddle.

    摘要翻译： 半导体器件具有安装在芯片上的管芯，其上升并且经由连接杆热连接到散热器结构。 由模具产生的热量从模具流到模具板到连接杆到散热器结构，然后流到外部环境或外部散热器。 通过将模具/桨叶子组件提升到散热器结构上方，封装的装置不易受到管芯和管芯附接粘合剂和/或管芯附接粘合剂和管芯焊盘之间的分层的影响。 可选的散热片环可围绕裸片。