-
公开(公告)号:US20130234306A1
公开(公告)日:2013-09-12
申请号:US13605990
申请日:2012-09-06
申请人: Shunan Qiu , Zhigang Bai , Haiyan Liu
发明人: Shunan Qiu , Zhigang Bai , Haiyan Liu
IPC分类号: H01L23/495 , H01L21/60
CPC分类号: H01L23/49558 , H01L23/3107 , H01L23/49541 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2924/00014 , H01L2924/00
摘要: A lead frame has a flag, a peripheral frame, and main tie bars coupling the flag to the peripheral frame. At least one cross tie bar extends between two of the main tie bars and an inner row of external connector pads extending from an inner side of the cross tie bar and an outer row of external connector pads extending from an outer side of the cross tie bar. Both an inner non-electrically conductive support bar and an outer non-electrically conductive support bar are attached across the two of the main tie bars. The inner non-electrically conductive support bar is attached to upper surfaces of the two of the main tie bars and to upper surfaces of the inner row of the external connector pads.
摘要翻译: 引线框架具有标志,外围框架和将标志耦合到外围框架的主连接条。 至少一个交叉连接杆在两个主连接杆之间延伸,以及从交叉连接杆的内侧延伸的内排的外部连接器焊盘以及从交叉连接杆的外侧延伸的外部排的外部连接器焊盘 。 内部非导电支撑杆和外部非导电支撑杆都穿过两个主连接杆。 内部非导电支撑杆附接到两个主连杆的上表面和外部连接器垫的内排的上表面。
-
公开(公告)号:US08643156B2
公开(公告)日:2014-02-04
申请号:US13605990
申请日:2012-09-06
申请人: Shunan Qiu , Zhigang Bai , Haiyan Liu
发明人: Shunan Qiu , Zhigang Bai , Haiyan Liu
IPC分类号: H01L23/495 , H01L21/60
CPC分类号: H01L23/49558 , H01L23/3107 , H01L23/49541 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2924/00014 , H01L2924/00
摘要: A lead frame has a flag, a peripheral frame, and main tie bars coupling the flag to the peripheral frame. At least one cross tie bar extends between two of the main tie bars and an inner row of external connector pads extending from an inner side of the cross tie bar and an outer row of external connector pads extending from an outer side of the cross tie bar. Both an inner non-electrically conductive support bar and an outer non-electrically conductive support bar are attached across the two of the main tie bars. The inner non-electrically conductive support bar is attached to upper surfaces of the two of the main tie bars and to upper surfaces of the inner row of the external connector pads.
摘要翻译: 引线框架具有标志,外围框架和将标志耦合到外围框架的主连接条。 至少一个交叉连接杆在两个主连接杆之间延伸,以及从交叉连接杆的内侧延伸的内排的外部连接器焊盘以及从交叉连接杆的外侧延伸的外部排的外部连接器焊盘 。 内部非导电支撑杆和外部非导电支撑杆都穿过两个主连接杆。 内部非导电支撑杆附接到两个主连杆的上表面和外部连接器垫的内排的上表面。
-
公开(公告)号:US08692387B2
公开(公告)日:2014-04-08
申请号:US13490451
申请日:2012-06-06
申请人: Shunan Qiu , Guoliang Gong , Xuesong Xu , Xingshou Pang , Beiyue Yan , Yinghui Li
发明人: Shunan Qiu , Guoliang Gong , Xuesong Xu , Xingshou Pang , Beiyue Yan , Yinghui Li
IPC分类号: H01L23/31
CPC分类号: H01L23/3135 , H01L21/56 , H01L21/568 , H01L23/31 , H01L23/49537 , H01L23/49541 , H01L23/49575 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/05554 , H01L2224/06134 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/4846 , H01L2224/49171 , H01L2224/49177 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/01029 , H01L2924/10162 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/078 , H01L2924/00
摘要: A semiconductor package and method of assembling a semiconductor package includes encapsulating a first pre-packaged semiconductor die stacked on top of and interconnected with a second semiconductor die. The first packaged semiconductor die is positioned and fixed relative to a lead frame with a temporary carrier such as tape. The second semiconductor die is attached and interconnected directly to the first packaged semiconductor die and lead frame. The interconnected first packaged die and second semiconductor die, and lead frame are encapsulated to form the semiconductor package. Different types of semiconductor packages such as quad flat no-lead (QFN) and ball grid array (BGA) may be formed, which provide increased input/output (I/O) count and functionality.
摘要翻译: 半导体封装和组装半导体封装的方法包括封装堆叠在第二半导体管芯的顶部并与第二半导体管芯互连的第一预先封装的半导体管芯。 第一封装半导体管芯相对于具有诸如带的临时载体的引线框定位和固定。 第二半导体管芯被连接并直接连接到第一封装半导体管芯和引线框架。 互连的第一封装管芯和第二半导体管芯以及引线框架被封装以形成半导体封装。 可以形成不同类型的半导体封装,例如四边形无引线(QFN)和球栅阵列(BGA),其提供增加的输入/输出(I / O)计数和功能。
-
公开(公告)号:US20140024199A1
公开(公告)日:2014-01-23
申请号:US13681401
申请日:2012-11-19
申请人: Shunan QIU , Guoliang GONG , Jun LI , Haiyan LIU
发明人: Shunan QIU , Guoliang GONG , Jun LI , Haiyan LIU
IPC分类号: H01L21/82
CPC分类号: H01L21/82 , H01L21/6836 , H01L21/78 , H01L23/544 , H01L2221/68327 , H01L2221/6834 , H01L2223/54426 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/94 , H01L2924/10156 , H01L2924/181 , H01L2224/03 , H01L2924/00012
摘要: A method of producing semiconductor dies includes providing a semiconductor wafer having front and back faces and an array of integrated circuits fabricated on it. The integrated circuits having active faces at the front face of the wafer. Grooves are cut mechanically from the back face partially through the wafer along saw streets between the integrated circuits. The integrated circuits are then singulated by scanning a laser beam on the front face within and along the saw streets, which scribes the wafer from the front face, and then singulating the integrated circuits by mechanically cleaving the wafer along the saw streets.
摘要翻译: 一种制造半导体管芯的方法包括提供具有正面和背面的半导体晶片和在其上制造的集成电路的阵列。 集成电路在晶片正面具有有效面。 通过集成电路之间的锯道,部分地通过晶片从背面机械地切割槽。 然后,通过扫描在正面上和沿着锯道的正面上的激光束,从前表面划分晶片,然后通过沿着锯切街道机械地切割晶片来对集成电路进行分割来分离集成电路。
-
公开(公告)号:US20130264714A1
公开(公告)日:2013-10-10
申请号:US13607731
申请日:2012-09-09
申请人: Guo Liang Gong , Shunan Qiu , Xuesong Xu
发明人: Guo Liang Gong , Shunan Qiu , Xuesong Xu
CPC分类号: H01L24/27 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/83 , H01L2224/04026 , H01L2224/04042 , H01L2224/29101 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/83815 , H01L2224/83951 , H01L2224/92247 , H01L2924/00014 , H01L2924/10158 , H01L2924/10253 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2924/014
摘要: A semiconductor die has interface electrodes on an interface surface and an electrically conductive layer on a mounting surface that is opposite to the interface surface. The electrically conductive layer extends onto side regions of the semiconductor die. Electrical conductors couple the interface electrodes to external connector pads. A solder alloy joins the semiconductor die to a flag. The solder alloy is disposed between the flag and the electrically conductive layer and provides a joint between the flag and both the mounting surface and the side regions.
摘要翻译: 半导体管芯在接口表面上具有界面电极,并且在与界面表面相对的安装表面上具有导电层。 导电层延伸到半导体管芯的侧面区域。 电导体将接口电极连接到外部连接器焊盘。 焊料合金将半导体管芯连接到标志。 焊料合金设置在标记和导电层之间,并且在标记与安装表面和侧部区域之间提供接合。
-
公开(公告)号:US20130037966A1
公开(公告)日:2013-02-14
申请号:US13495011
申请日:2012-06-13
申请人: Shunan QIU , Guoliang Gong , Junhua Luo , Xuesong Xu
发明人: Shunan QIU , Guoliang Gong , Junhua Luo , Xuesong Xu
CPC分类号: H01L29/0657 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/49513 , H01L23/544 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/92 , H01L2221/68327 , H01L2221/6834 , H01L2223/54426 , H01L2223/54453 , H01L2224/03009 , H01L2224/04042 , H01L2224/2919 , H01L2224/32245 , H01L2224/48247 , H01L2224/73265 , H01L2224/92247 , H01L2924/00014 , H01L2924/01322 , H01L2924/10155 , H01L2924/10156 , H01L2924/10158 , H01L2924/12042 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A semiconductor device includes a semiconductor die having first and second opposing faces and an edge surface. The edge surface has an undercut under the first face. The second face of the semiconductor die is bonded to a bonding surface of a die support member, such as a thermally conductive flag of a lead frame, with a die attach material. A fillet of the bonding material is formed within the undercut.
摘要翻译: 半导体器件包括具有第一和第二相对面和边缘表面的半导体管芯。 边缘表面在第一面下方具有底切。 半导体管芯的第二面通过管芯附着材料接合到管芯支撑构件的接合表面,例如引线框架的导热标记。 在底切下形成接合材料的圆角。
-
公开(公告)号:US20130020690A1
公开(公告)日:2013-01-24
申请号:US13490451
申请日:2012-06-06
申请人: Shunan QIU , Guoliang GONG , Xuesong XU , Xingshou PANG , Beiyue YAN , Yinghui LI
发明人: Shunan QIU , Guoliang GONG , Xuesong XU , Xingshou PANG , Beiyue YAN , Yinghui LI
IPC分类号: H01L23/495 , H01L21/56
CPC分类号: H01L23/3135 , H01L21/56 , H01L21/568 , H01L23/31 , H01L23/49537 , H01L23/49541 , H01L23/49575 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/05554 , H01L2224/06134 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/4846 , H01L2224/49171 , H01L2224/49177 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/01029 , H01L2924/10162 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/078 , H01L2924/00
摘要: A semiconductor package and method of assembling a semiconductor package includes encapsulating a first pre-packaged semiconductor die stacked on top of and interconnected with a second semiconductor die. The first packaged semiconductor die is positioned and fixed relative to a lead frame with a temporary carrier such as tape. The second semiconductor die is attached and interconnected directly to the first packaged semiconductor die and lead frame. The interconnected first packaged die and second semiconductor die, and lead frame are encapsulated to form the semiconductor package. Different types of semiconductor packages such as quad flat no-lead (QFN) and ball grid array (BGA) may be formed, which provide increased input/output (I/O) count and functionality.
摘要翻译: 半导体封装和组装半导体封装的方法包括封装堆叠在第二半导体管芯的顶部并与第二半导体管芯互连的第一预先封装的半导体管芯。 第一封装半导体管芯相对于具有诸如带的临时载体的引线框定位和固定。 第二半导体管芯被连接并直接连接到第一封装半导体管芯和引线框架。 互连的第一封装管芯和第二半导体管芯以及引线框架被封装以形成半导体封装。 可以形成不同类型的半导体封装,例如四边形无引线(QFN)和球栅阵列(BGA),其提供增加的输入/输出(I / O)计数和功能。
-
公开(公告)号:US20120286406A1
公开(公告)日:2012-11-15
申请号:US13461801
申请日:2012-05-02
申请人: Shunan QIU , Zhigang Bai , Xuesong Xu , Beiyue Yan , You Ge
发明人: Shunan QIU , Zhigang Bai , Xuesong Xu , Beiyue Yan , You Ge
IPC分类号: H01L23/495 , H01L21/00
CPC分类号: H01L23/49555 , H01L21/4842 , H01L2924/0002 , H01L2924/00
摘要: A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch.
摘要翻译: 一种用于组装半导体器件的方法包括提供具有天然平面的引线框架和具有天然引线间距的多个引线。 该过程包括修剪和形成多个引线的第一子集以提供第一行引线。 该过程包括修剪和形成多个引线的第二子集以提供第二排引线。 引线的至少一个子集以相对于天平平面的钝角形成,使得与引线的第一或第二子集相关联的引线间距大于原始引线间距。
-
公开(公告)号:US08643153B2
公开(公告)日:2014-02-04
申请号:US13461801
申请日:2012-05-02
申请人: Shunan Qiu , Zhigang Bai , Xuesong Xu , Beiyue Yan , You Ge
发明人: Shunan Qiu , Zhigang Bai , Xuesong Xu , Beiyue Yan , You Ge
IPC分类号: H01L23/495 , H01L23/48
CPC分类号: H01L23/49555 , H01L21/4842 , H01L2924/0002 , H01L2924/00
摘要: A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch.
摘要翻译: 一种用于组装半导体器件的方法包括提供具有天然平面的引线框架和具有天然引线间距的多个引线。 该过程包括修剪和形成多个引线的第一子集以提供第一行引线。 该过程包括修剪和形成多个引线的第二子集以提供第二排引线。 引线的至少一个子集以相对于天平平面的钝角形成,使得与引线的第一或第二子集相关联的引线间距大于原始引线间距。
-
-
-
-
-
-
-
-