公开(公告)号：US08942019B2

公开(公告)日：2015-01-27

申请号：US13286430

申请日：2011-11-01

申请人： Sampat Shekhawat ,  Myoungho Lee ,  Yongtaek Lee ,  Jacobo Aguillon-Garcia ,  Bongjoo Choi

发明人： Sampat Shekhawat ,  Myoungho Lee ,  Yongtaek Lee ,  Jacobo Aguillon-Garcia ,  Bongjoo Choi

IPC分类号： H02M7/5387 ,  H02M7/487 ,  H02M7/537 ,  H02M1/00

CPC分类号： H02M7/487 ,  H02M7/5388 ,  H02M2001/007

摘要： A multilevel inverter circuit includes an inverter control circuit that controls switching of main and neutral switches. The inverter control circuit receives current vector information indicating flow direction of an AC current output of the multilevel inverter circuit. The inverter control circuit eliminates dead time between switching of a neutral switch and a main switch depending on whether the AC current output is flowing towards a load or away from the load. Among other advantages, elimination of dead time improves the total harmonic distortion of the sinusoidal AC voltage output of the multilevel inverter circuit.

摘要翻译： 多电平逆变器电路包括控制主开关和中性开关的切换的逆变器控制电路。 逆变器控制电路接收指示多电平逆变器电路的交流电流输出的流向的电流矢量信息。 逆变器控制电路根据交流电流输出是否流向负载或远离负载，消除了中性点开关和主开关的切换之间的死区时间。 除了其他优点之外，消除死区时间提高了多电平逆变器电路的正弦交流电压输出的总谐波失真。

公开(公告)号：US20120299149A1

公开(公告)日：2012-11-29

申请号：US13572517

申请日：2012-08-10

申请人： YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn

发明人： YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn

IPC分类号： H01L21/02 ,  H01L27/08

CPC分类号： H01L27/08 ,  H01L23/5223 ,  H01L23/5225 ,  H01L27/1203 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device is made by forming an oxide layer over a substrate and forming a first conductive layer over the oxide layer. The first conductive layer is connected to ground. A second conductive layer is formed over the first conductive layer as a plurality of segments. A third conductive layer is formed over the second conductive layer as a plurality of segments. If the conductive layers are electrically isolated, then a conductive via is formed through these layers. A first segment of the third conductive layer operates as a first passive circuit element. A second segment operates as a second passive circuit element. A third segment is connected to ground and operates as a shield disposed between the first and second segments. The shield has a height at least equal to a height of the passive circuit elements to block cross-talk between the passive circuit elements.

摘要翻译： 通过在衬底上形成氧化物层并在氧化物层上形成第一导电层来制造半导体器件。 第一导电层连接到地面。 在第一导电层上形成第二导电层作为多个段。 在第二导电层上形成第三导电层作为多个段。 如果导电层是电隔离的，则通过这些层形成导电通孔。 第三导电层的第一段作为第一无源电路元件工作。 第二段作为第二无源电路元件工作。 第三段连接到地面并作为设置在第一和第二段之间的屏蔽来操作。 屏蔽件的高度至少等于无源电路元件的高度，以阻止无源电路元件之间的串扰。

公开(公告)号：US08183130B2

公开(公告)日：2012-05-22

申请号：US12816190

申请日：2010-06-15

申请人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

发明人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

IPC分类号： H01L21/00

CPC分类号： H01L21/561 ,  H01L23/3114 ,  H01L23/552 ,  H01L23/64 ,  H01L25/16 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/13091

摘要： A semiconductor wafer has an insulating layer over a first surface of the substrate. An IPD structure is formed over the insulating layer. The IPD structure includes a MIM capacitor and inductor. A conductive via is formed through a portion of the IPD structure and partially through the substrate. The conductive via can be formed in first and second portions. The first portion is formed partially through the substrate and second portion is formed through a portion of the IPD structure. A first via is formed through a second surface of the substrate to the conductive via. A shielding layer is formed over the second surface of the substrate wafer. The shielding layer extends into the first via to the conductive via. The shielding layer is electrically connected through the conductive via to an external ground point. The semiconductor wafer is singulated through the conductive via.

摘要翻译： 半导体晶片在基板的第一表面上具有绝缘层。 IPD结构形成在绝缘层上。 IPD结构包括MIM电容和电感。 导电通孔通过IPD结构的一部分形成，并且部分地穿过衬底。 导电通孔可以形成在第一和第二部分中。 第一部分部分地穿过基底，第二部分通过IPD结构的一部分形成。 第一通孔通过衬底的第二表面形成到导电通孔。 在衬底晶片的第二表面上形成屏蔽层。 屏蔽层延伸到第一通孔到导电通孔。 屏蔽层通过导电通孔电连接到外部接地点。 通过导电通孔将半导体晶片分离。

公开(公告)号：US20130107599A1

公开(公告)日：2013-05-02

申请号：US13286430

申请日：2011-11-01

申请人： Sampat SHEKHAWAT ,  Myoungho LEE ,  Yongtaek LEE ,  Jacobo AGUILLON-GARCIA ,  Bongjoo CHOI

发明人： Sampat SHEKHAWAT ,  Myoungho LEE ,  Yongtaek LEE ,  Jacobo AGUILLON-GARCIA ,  Bongjoo CHOI

IPC分类号： H02M7/537

CPC分类号： H02M7/487 ,  H02M7/5388 ,  H02M2001/007

摘要： A multilevel inverter circuit includes an inverter control circuit that controls switching of main and neutral switches. The inverter control circuit receives current vector information indicating flow direction of an AC current output of the multilevel inverter circuit. The inverter control circuit eliminates dead time between switching of a neutral switch and a main switch depending on whether the AC current output is flowing towards a load or away from the load. Among other advantages, elimination of dead time improves the total harmonic distortion of the sinusoidal AC voltage output of the multilevel inverter circuit.

摘要翻译： 多电平逆变器电路包括控制主开关和中性开关的切换的逆变器控制电路。 逆变器控制电路接收指示多电平逆变器电路的交流电流输出的流向的电流矢量信息。 逆变器控制电路根据交流电流输出是否流向负载或远离负载，消除了中性点开关和主开关的切换之间的死区时间。 除了其他优点之外，消除死区时间提高了多电平逆变器电路的正弦交流电压输出的总谐波失真。

公开(公告)号：US20120187531A1

公开(公告)日：2012-07-26

申请号：US13438463

申请日：2012-04-03

申请人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

发明人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

IPC分类号： H01L29/02

CPC分类号： H01L21/561 ,  H01L23/3114 ,  H01L23/552 ,  H01L23/64 ,  H01L25/16 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/13091

摘要： A semiconductor wafer has an insulating layer over a first surface of the substrate. An IPD structure is formed over the insulating layer. The IPD structure includes a MIM capacitor and inductor. A conductive via is formed through a portion of the IPD structure and partially through the substrate. The conductive via can be formed in first and second portions. The first portion is formed partially through the substrate and second portion is formed through a portion of the IPD structure. A first via is formed through a second surface of the substrate to the conductive via. A shielding layer is formed over the second surface of the substrate wafer. The shielding layer extends into the first via to the conductive via. The shielding layer is electrically connected through the conductive via to an external ground point. The semiconductor wafer is singulated through the conductive via.

摘要翻译： 半导体晶片在基板的第一表面上具有绝缘层。 IPD结构形成在绝缘层上。 IPD结构包括MIM电容和电感。 导电通孔通过IPD结构的一部分形成，并且部分地穿过衬底。 导电通孔可以形成在第一和第二部分中。 第一部分部分地穿过基底，第二部分通过IPD结构的一部分形成。 第一通孔通过衬底的第二表面形成到导电通孔。 在衬底晶片的第二表面上形成屏蔽层。 屏蔽层延伸到第一通孔到导电通孔。 屏蔽层通过导电通孔电连接到外部接地点。 通过导电通孔将半导体晶片分离。

公开(公告)号：US09190340B2

公开(公告)日：2015-11-17

申请号：US13163026

申请日：2011-06-17

申请人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

发明人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

IPC分类号： H01L23/28 ,  H01L23/31 ,  H01L21/56 ,  H01L25/065 ,  H01L23/64 ,  H01L23/66 ,  H01L25/16 ,  H01L23/498

CPC分类号： H01L23/3121 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/645 ,  H01L23/66 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/16 ,  H01L2223/6672 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/92247 ,  H01L2225/06558 ,  H01L2924/01322 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00014

摘要： A semiconductor device has a first semiconductor die containing a low pass filter and baluns. The first semiconductor die has a high resistivity substrate. A second semiconductor die including a bandpass filter is mounted to the first semiconductor die. The second semiconductor die has a gallium arsenide substrate. A third semiconductor die including an RF switch is mounted to the first semiconductor die. A fourth semiconductor die includes an RF transceiver. The first, second, and third semiconductor die are mounted to the fourth semiconductor die. The first, second, third, and fourth semiconductor die are mounted to a substrate. An encapsulant is deposited over the first, second, third, and fourth semiconductor die and substrate. A plurality of bond wires is formed between the second semiconductor die and first semiconductor die, and between the third semiconductor die and first semiconductor die, and between the first semiconductor die and substrate.

摘要翻译： 半导体器件具有包含低通滤波器和巴伦的第一半导体管芯。 第一半导体管芯具有高电阻率的衬底。 包括带通滤波器的第二半导体管芯被安装到第一半导体管芯。 第二半导体管芯具有砷化镓基板。 包括RF开关的第三半导体管芯被安装到第一半导体管芯。 第四半导体管芯包括RF收发器。 第一，第二和第三半导体管芯安装到第四半导体管芯。 第一，第二，第三和第四半导体管芯安装在基板上。 密封剂沉积在第一，第二，第三和第四半导体管芯和衬底上。 在第二半导体管芯和第一半导体管芯之间以及第三半导体管芯和第一半导体管芯之间以及第一半导体管芯和衬底之间形成多个接合线。

公开(公告)号：US09082638B2

公开(公告)日：2015-07-14

申请号：US13572517

申请日：2012-08-10

申请人： YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn

发明人： YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn

IPC分类号： H01L29/00 ,  H01L27/08 ,  H01L49/02 ,  H01L23/522 ,  H01L27/12

CPC分类号： H01L27/08 ,  H01L23/5223 ,  H01L23/5225 ,  H01L27/1203 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor device is made by forming an oxide layer over a substrate and forming a first conductive layer over the oxide layer. The first conductive layer is connected to ground. A second conductive layer is formed over the first conductive layer as a plurality of segments. A third conductive layer is formed over the second conductive layer as a plurality of segments. If the conductive layers are electrically isolated, then a conductive via is formed through these layers. A first segment of the third conductive layer operates as a first passive circuit element. A second segment operates as a second passive circuit element. A third segment is connected to ground and operates as a shield disposed between the first and second segments. The shield has a height at least equal to a height of the passive circuit elements to block cross-talk between the passive circuit elements.

摘要翻译： 通过在衬底上形成氧化物层并在氧化物层上形成第一导电层来制造半导体器件。 第一导电层连接到地面。 在第一导电层上形成第二导电层作为多个段。 在第二导电层上形成第三导电层作为多个段。 如果导电层是电隔离的，则通过这些层形成导电通孔。 第三导电层的第一段作为第一无源电路元件工作。 第二段作为第二无源电路元件工作。 第三段连接到地面并作为设置在第一和第二段之间的屏蔽来操作。 屏蔽件的高度至少等于无源电路元件的高度，以阻止无源电路元件之间的串扰。

公开(公告)号：US20110304011A1

公开(公告)日：2011-12-15

申请号：US12816190

申请日：2010-06-15

申请人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

发明人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

IPC分类号： H01L29/92 ,  H01L21/50

CPC分类号： H01L21/561 ,  H01L23/3114 ,  H01L23/552 ,  H01L23/64 ,  H01L25/16 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/13091

摘要： A semiconductor wafer has an insulating layer over a first surface of the substrate. An IPD structure is formed over the insulating layer. The IPD structure includes a MIM capacitor and inductor. A conductive via is formed through a portion of the IPD structure and partially through the substrate. The conductive via can be formed in first and second portions. The first portion is formed partially through the substrate and second portion is formed through a portion of the IPD structure. A first via is formed through a second surface of the substrate to the conductive via. A shielding layer is formed over the second surface of the substrate wafer. The shielding layer extends into the first via to the conductive via. The shielding layer is electrically connected through the conductive via to an external ground point. The semiconductor wafer is singulated through the conductive via.

摘要翻译： 半导体晶片在基板的第一表面上具有绝缘层。 IPD结构形成在绝缘层上。 IPD结构包括MIM电容和电感。 导电通孔通过IPD结构的一部分形成，并且部分地穿过衬底。 导电通孔可以形成在第一和第二部分中。 第一部分部分地穿过基底，第二部分通过IPD结构的一部分形成。 第一通孔通过衬底的第二表面形成到导电通孔。 在衬底晶片的第二表面上形成屏蔽层。 屏蔽层延伸到第一通孔到导电通孔。 屏蔽层通过导电通孔电连接到外部接地点。 通过导电通孔将半导体晶片分离。

公开(公告)号：US08896115B2

公开(公告)日：2014-11-25

申请号：US13438463

申请日：2012-04-03

申请人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

发明人： YongTaek Lee ,  HyunTai Kim ,  Gwang Kim ,  ByungHoon Ahn

IPC分类号： H01L23/04 ,  H01L21/56 ,  H01L23/552 ,  H01L25/16 ,  H01L23/31 ,  H01L23/64

CPC分类号： H01L21/561 ,  H01L23/3114 ,  H01L23/552 ,  H01L23/64 ,  H01L25/16 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/13091

摘要： A semiconductor wafer has an insulating layer over a first surface of the substrate. An IPD structure is formed over the insulating layer. The IPD structure includes a MIM capacitor and inductor. A conductive via is formed through a portion of the IPD structure and partially through the substrate. The conductive via can be formed in first and second portions. The first portion is formed partially through the substrate and second portion is formed through a portion of the IPD structure. A first via is formed through a second surface of the substrate to the conductive via. A shielding layer is formed over the second surface of the substrate wafer. The shielding layer extends into the first via to the conductive via. The shielding layer is electrically connected through the conductive via to an external ground point. The semiconductor wafer is singulated through the conductive via.

摘要翻译： 半导体晶片在基板的第一表面上具有绝缘层。 IPD结构形成在绝缘层上。 IPD结构包括MIM电容和电感。 导电通孔通过IPD结构的一部分形成，并且部分地穿过衬底。 导电通孔可以形成在第一和第二部分中。 第一部分部分地穿过基底，第二部分通过IPD结构的一部分形成。 第一通孔通过衬底的第二表面形成到导电通孔。 在衬底晶片的第二表面上形成屏蔽层。 屏蔽层延伸到第一通孔到导电通孔。 屏蔽层通过导电通孔电连接到外部接地点。 通过导电通孔将半导体晶片分离。

公开(公告)号：US08349648B2

公开(公告)日：2013-01-08

申请号：US12816225

申请日：2010-06-15

申请人： HyunTai Kim ,  YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

发明人： HyunTai Kim ,  YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

IPC分类号： H01L21/98

CPC分类号： H01L27/0676 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L27/016 ,  H01L27/0805 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6677 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a substrate and RF FEM formed over the substrate. The RF FEM includes an LC low-pass filter having an input coupled for receiving a transmit signal. A Tx/Rx switch has a first terminal coupled to an output of the LC filter. A diplexer has a first terminal coupled to a second terminal of the Tx/Rx switch and a second terminal for providing an RF signal. An IPD band-pass filter has an input coupled to a third terminal of the Tx/Rx switch and an output providing a receive signal. The LC filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The IPD filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The RF FEM substrate can be stacked over a semiconductor package containing an RF transceiver.

摘要翻译： 半导体器件具有在衬底上形成的衬底和RF FEM。 RF FEM包括具有耦合用于接收发射信号的输入的LC低通滤波器。 Tx / Rx开关具有耦合到LC滤波器的输出的第一端子。 双工器具有耦合到Tx / Rx开关的第二端子的第一端子和用于提供RF信号的第二端子。 IPD带通滤波器具有耦合到Tx / Rx开关的第三端子的输入端和提供接收信号的输出端。 LC滤波器包括缠绕的导电迹线以显示感应和互感特性以及耦合到导电迹线的电容器。 IPD滤波器包括缠绕的导电迹线以显示感应和互感特性以及耦合到导电迹线的电容器。 RF FEM衬底可以堆叠在包含RF收发器的半导体封装上。