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公开(公告)号：US20120097442A1
公开(公告)日：2012-04-26
申请号：US13269212
申请日：2011-10-07
Applicant: Hideaki YOSHIMURA , Kenji Iida , Yasutomo Maehara
Inventor： Hideaki YOSHIMURA , Kenji Iida , Yasutomo Maehara
CPC classification number: H05K1/0366 , B29C70/46 , B29C70/545 , B29L2031/3425 , H01L23/145 , H01L23/49827 , H01L2924/0002 , H05K1/115 , H05K3/0097 , H05K2201/029 , H01L2924/00
Abstract: A printed circuit board includes a cell portion which includes cells having a plurality of through bores are arranged in a base material; and a base material portion which exists around an outer edge of the cell portion. The base material is formed of a prepreg, the prepreg includes a fiber material in which fiber threads are oriented in a first direction and in a second direction which is perpendicular to the first direction, and a resin material in which the fiber material is impregnated. The through bores are arranged along a third direction between the first direction and the second direction, wherein one side of the outer edges of the cell extends along the third direction.
Abstract translation: 印刷电路板包括：细胞部分，其包括具有多个通孔的细胞，其布置在基材中; 以及围绕电池部分的外边缘存在的基材部分。 基材由预浸料坯形成，预浸料坯包括纤维材料，其中纤维线沿第一方向和与第一方向垂直的第二方向定向，以及其中浸渍纤维材料的树脂材料。 通孔沿着第一方向和第二方向之间的第三方向布置，其中电池的外边缘的一侧沿着第三方向延伸。
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公开(公告)号：US08153908B2
公开(公告)日：2012-04-10
申请号：US12173371
申请日：2008-07-15
Applicant: Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
Inventor： Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
CPC classification number: H05K9/00 , H05K3/38 , H05K3/429 , H05K3/4608 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09581 , H05K2201/0959 , H05K2201/09781 , H05K2201/09809 , H05K2201/2072 , Y10T29/49155
Abstract: The circuit board is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different. The circuit board comprises: the base member; and the cable layer being laminated on the base member with anchor patterns, which are electrically conductive layers formed on a surface of the base member.
Abstract translation: 即使基部构件和电缆层的热膨胀系数明显不同，电路板也能够将基座构件上的电缆层紧密接合。 电路板包括：基座部件; 并且电缆层被层压在具有锚定图案的基底构件上，锚定图案是形成在基底构件的表面上的导电层。
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公开(公告)号：US20090095511A1
公开(公告)日：2009-04-16
申请号：US12173371
申请日：2008-07-15
Applicant: Kenji IIDA , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
Inventor： Kenji IIDA , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
CPC classification number: H05K9/00 , H05K3/38 , H05K3/429 , H05K3/4608 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09581 , H05K2201/0959 , H05K2201/09781 , H05K2201/09809 , H05K2201/2072 , Y10T29/49155
Abstract: The circuit board is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different. The circuit board comprises: the base member; and the cable layer being laminated on the base member with anchor patterns, which are electrically conductive layers formed on a surface of the base member.
Abstract translation: 即使基部构件和电缆层的热膨胀系数明显不同，电路板也能够将基座构件上的电缆层紧密接合。 电路板包括：基座部件; 并且所述电缆层被层压在所述基底构件上，所述锚固图案是形成在所述基底构件的表面上的导电层。
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公开(公告)号：US20090094825A1
公开(公告)日：2009-04-16
申请号：US12175732
申请日：2008-07-18
Applicant: Yasutomo MAEHARA , Kenji Iida , Tomoyuki Abe , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
Inventor： Yasutomo MAEHARA , Kenji Iida , Tomoyuki Abe , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
IPC: H05K3/02
CPC classification number: H05K3/427 , H05K1/115 , H05K1/116 , H05K3/0094 , H05K3/061 , H05K3/429 , H05K3/4602 , H05K3/4611 , H05K3/4691 , H05K2201/0347 , H05K2201/09581 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , H05K2203/135 , H05K2203/1476 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
Abstract: The method of producing a substrate comprises the steps of: forming a through-hole in a base member; plating the base member so as to coat an inner face of the through-hole with a plated layer; applying photo resist on the base member; optically exposing and developing the photo resist so as to form a resist pattern, which coats at least a planar area of the through-hole; and etching an electrically conductive layer formed on the surface of the base member. The resist pattern is formed so as to separate an area of exposing the conductive layer a prescribed distance away from an edge of the through-hole, and the prescribed length is longer than a distance of etching a side face of the conductive layer in the etching step.
Abstract translation: 制造基板的方法包括以下步骤：在基底构件中形成通孔; 电镀所述基底构件以便用镀层涂覆所述通孔的内表面; 在基底上施加光刻胶; 对光致抗蚀剂进行光学曝光和显影，以形成至少覆盖通孔的平面区域的抗蚀剂图案; 以及蚀刻形成在所述基底构件的表面上的导电层。 形成抗蚀剂图形，以将导电层暴露出距通孔边缘规定距离的区域，并且规定的长度比蚀刻导电层的侧面的距离长 步。
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公开(公告)号：US20090084590A1
公开(公告)日：2009-04-02
申请号：US12188257
申请日：2008-08-08
Applicant: Hideaki YOSHIMURA , Kenji Fukuzono , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Takashi Nakagawa , Shin Hirano , Takashi Kanda
Inventor： Hideaki YOSHIMURA , Kenji Fukuzono , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Takashi Nakagawa , Shin Hirano , Takashi Kanda
IPC: H05K1/00
CPC classification number: H05K1/0366 , H05K1/0271 , H05K1/056 , H05K3/4608 , H05K2201/0323 , H05K2201/068 , H05K2201/09145 , Y10T428/24917 , Y10T428/24926
Abstract: A circuit board has a low thermal expansion coefficient that suits the thermal expansion coefficient of an element to be mounted thereupon and can prevent the occurrence of delamination and cracking of a core layer when the circuit board is used in a low temperature environment. The circuit board is constructed by laminating a core layer and at least one wiring layer, where the at least one wiring layer has slightly smaller external dimensions in a planar direction than the core layer.
Abstract translation: 电路板具有适合要安装的元件的热膨胀系数的低热膨胀系数，并且可以防止当在低温环境中使用电路板时芯层的分层和破裂的发生。 电路板通过层叠芯层和至少一个布线层而构成，其中至少一个布线层在平面方向上具有比芯层稍小的外部尺寸。
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Patent Agency Ranking
公开(公告)号：US08119925B2
公开(公告)日：2012-02-21
申请号：US12390010
申请日：2009-02-20
Applicant: Hideaki Yoshimura , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Takashi Nakagawa , Shin Hirano
Inventor： Hideaki Yoshimura , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Takashi Nakagawa , Shin Hirano
IPC: H05K1/00
CPC classification number: H05K3/4641 , H05K3/445 , H05K3/4608 , H05K2201/0281 , H05K2201/0323 , H05K2201/09536 , H05K2201/09809 , Y10T428/24331
Abstract: The core layer of a core substrate is made of carbon fibers impregnated with resin. When the temperature of the core layer increases, the core layer suffers from an increase in the thickness because of thermal expansion of the resin. The core layer is sandwiched between the insulating layers containing glass fibers. The insulating layers serve to suppress an increase in the thickness of the core layer resulting from the thermal expansion of the core layer. Thermal stress is suppressed in the core substrate.
Abstract translation: 核心基材的芯层由浸渍有树脂的碳纤维制成。 当芯层的温度升高时，由于树脂的热膨胀，芯层的厚度增加。 芯层夹在包含玻璃纤维的绝缘层之间。 绝缘层用于抑制由芯层的热膨胀产生的芯层的厚度的增加。 核心基板中的热应力被抑制。
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公开(公告)号：US08110749B2
公开(公告)日：2012-02-07
申请号：US12390168
申请日：2009-02-20
Applicant: Hideaki Yoshimura , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano
Inventor： Hideaki Yoshimura , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano
IPC: H05K1/16
CPC classification number: H05K3/445 , H05K3/4608 , H05K2201/0323 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/09609 , H05K2201/09809
Abstract: Large-sized through holes are formed in a core layer of a printed wiring board. Large-sized vias are formed in the shape of a cylinder along the inward wall surfaces of the large-sized through holes located within a specific area. A filling material fills the inner space of the large-sized via. A small-sized through hole penetrates through the corresponding filling material along the longitudinal axis of the small-sized through hole. A small-sized via is formed in the shape of a cylinder along the inward wall surface of the small-sized through hole. The filling material and the core layer are uniformly distributed within the specific area in the in-plane direction of the core substrate. This results in suppression of uneven distribution of thermal stress in the core layer in the in-plane direction of the core layer.
Abstract translation: 在印刷电路板的芯层中形成大尺寸的通孔。 大尺寸通孔沿着位于特定区域内的大尺寸通孔的内壁表面形成为圆柱体的形状。 填充材料填充大尺寸通孔的内部空间。 小尺寸的通孔穿过相应的填充材料沿着小尺寸通孔的纵向轴线。 小尺寸的通孔沿着小尺寸通孔的内壁表面形成为圆柱体的形状。 填充材料和芯层均匀地分布在芯基板的面内方向的特定区域内。 这导致抑制芯层在芯层的面内方向上的热应力的不均匀分布。
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公开(公告)号：US07943001B2
公开(公告)日：2011-05-17
申请号：US11649203
申请日：2007-01-04
Applicant: Takashi Nakagawa , Seiichi Sugano , Kenji Iida , Yasutomo Maehara , Hitoshi Suzuki , Kaoru Sugimoto , Kenji Fukuzono , Takashi Kanda , Hiroaki Date , Tomohisa Yagi
Inventor： Takashi Nakagawa , Seiichi Sugano , Kenji Iida , Yasutomo Maehara , Hitoshi Suzuki , Kaoru Sugimoto , Kenji Fukuzono , Takashi Kanda , Hiroaki Date , Tomohisa Yagi
IPC: H04K3/34
CPC classification number: H05K3/4614 , H05K3/321 , H05K3/361 , H05K3/4069 , H05K2201/0218 , H05K2203/0425 , H05K2203/0568 , H05K2203/063 , Y10T29/49117
Abstract: A process for producing a multilayer board includes the steps of applying a bonding ink to the terminal of the first substrate, the bonding ink including a thermosetting resin containing a filler and a curing agent, the filler being formed of metal particles plated with solder, the metal particles each having a first melting point, and the solder having a second melting point lower than the first melting point; bonding the second substrate to a bonding sheet composed of a thermosetting resin and having a through hole disposed in a portion corresponding to the terminal of the second substrate; and heating and pressurizing the first and second substrates with the bonding sheet in such a manner that the terminals are opposite each other to effect curing of the bonding sheet and the bonding ink and to form an integral structure.
Abstract translation: 一种制造多层板的方法包括以下步骤：将粘合油墨施加到第一基板的端子上，粘合油墨包括含有填料和固化剂的热固性树脂，填料由镀有焊料的金属颗粒形成， 金属颗粒各自具有第一熔点，并且焊料具有低于第一熔点的第二熔点; 将第二基板接合到由热固性树脂构成的接合片，并且具有设置在与第二基板的端子对应的部分中的通孔; 并且利用接合片以这样的方式对第一和第二基板进行加热和加压，使得端子彼此相对以实现粘合片和粘合油墨的固化并形成一体结构。
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公开(公告)号：US20090294161A1
公开(公告)日：2009-12-03
申请号：US12390010
申请日：2009-02-20
Applicant: Hideaki YOSHIMURA , Kenji IIDA , Tomoyuki ABE , Yasutomo MAEHARA , Takashi NAKAGAWA , Shin HIRANO
Inventor： Hideaki YOSHIMURA , Kenji IIDA , Tomoyuki ABE , Yasutomo MAEHARA , Takashi NAKAGAWA , Shin HIRANO
CPC classification number: H05K3/4641 , H05K3/445 , H05K3/4608 , H05K2201/0281 , H05K2201/0323 , H05K2201/09536 , H05K2201/09809 , Y10T428/24331
Abstract: The core layer of a core substrate is made of carbon fibers impregnated with resin. When the temperature of the core layer increases, the core layer suffers from an increase in the thickness because of thermal expansion of the resin. The core layer is sandwiched between the insulating layers containing glass fibers. The insulating layers serve to suppress an increase in the thickness of the core layer resulting from the thermal expansion of the core layer. Thermal stress is suppressed in the core substrate.
Abstract translation: 核心基材的芯层由浸渍有树脂的碳纤维制成。 当芯层的温度升高时，由于树脂的热膨胀，芯层的厚度增加。 芯层夹在包含玻璃纤维的绝缘层之间。 绝缘层用于抑制由芯层的热膨胀产生的芯层的厚度的增加。 核心基板中的热应力被抑制。
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公开(公告)号：US06959125B2
公开(公告)日：2005-10-25
申请号：US10341437
申请日：2003-01-14
Applicant: Takashi Kanda , Kiyotaka Seyama , Kaoru Sugimoto , Souichi Obata , Yasutomo Maehara
Inventor： Takashi Kanda , Kiyotaka Seyama , Kaoru Sugimoto , Souichi Obata , Yasutomo Maehara
CPC classification number: G02B6/43 , G02B6/42 , H01L2224/48091 , H01L2224/73257 , H01L2924/00014
Abstract: It is an object of the present invention to enhance laser beam transmitting efficiency by accurately controlling an interval between a light emitting (light receiving) element (20) and an optical wave-guide substrate (1) without causing any fluctuation in the interval in a mounting structure of the light transmitting element in which the light emitting (light receiving) element (20) is mounted on the optical wave-guide substrate (1). When the light emitting (light receiving) element is joined to the sub-mount chip (4) and when the sub-mount chip (4) is joined to the optical wave-guide while the element is being directed to the substrate side, the sub-mount chip and the optical wave-guide substrate are joined to each other by the solder bump (6). A post (5) is arranged for regulating an interval between the light emitting (light receiving) element and the optical wave-guide substrate.
Abstract translation: 本发明的目的是通过精确地控制发光（光接收）元件（20）和光波导基板（1）之间的间隔而不会引起在 其中发光（光接收）元件（20）安装在光波导基板（1）上的透光元件的安装结构。 当发光（光接收）元件接合到子安装芯片（4）时，并且当元件被引导到基板侧时，子安装芯片（4）接合到光波导上时， 副安装芯片和光波导基板通过焊料凸块（6）相互连接。 布置用于调节发光（光接收）元件和光波导基板之间的间隔的柱（5）。
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