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    Semiconductor device and manufacturing method thereof
    1.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US08148248B2

    公开(公告)日：2012-04-03

    申请号：US13053733

    申请日：2011-03-22

    Applicant: Toshiaki Tsutsumi ,  Tomonori Okudaira ,  Keiichiro Kashihara ,  Tadashi Yamaguchi

    Inventor： Toshiaki Tsutsumi ,  Tomonori Okudaira ,  Keiichiro Kashihara ,  Tadashi Yamaguchi

    IPC: H01L21/3205 ,  H01L21/4763

    CPC classification number: H01L23/485 ,  H01L21/28518 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: There is provided a semiconductor device having a metal silicide layer which can suppress the malfunction and the increase in power consumption of the device. The semiconductor device has a semiconductor substrate containing silicon and having a main surface, first and second impurity diffusion layers formed in the main surface of the semiconductor substrate, a metal silicide formed over the second impurity diffusion layer, and a silicon nitride film and a first interlayer insulation film sequentially stacked over the metal silicide. In the semiconductor device, a contact hole penetrating through the silicon nitride film and the first interlayer insulation film, and reaching the surface of the metal silicide is formed. The thickness of a portion of the metal silicide situated immediately under the contact hole is smaller than the thickness of a portion of the metal silicide situated around the contact hole.

    Abstract translation: 提供了具有金属硅化物层的半导体器件，其可以抑制器件的故障和功率消耗的增加。 半导体器件具有包含硅并具有主表面的半导体衬底，形成在半导体衬底的主表面中的第一和第二杂质扩散层，形成在第二杂质扩散层上的金属硅化物，以及氮化硅膜和第一 层间绝缘膜依次层叠在金属硅化物上。 在半导体器件中，形成穿过氮化硅膜和第一层间绝缘膜并到达金属硅化物表面的接触孔。 位于接触孔正下方的金属硅化物的一部分的厚度小于位于接触孔周围的金属硅化物的一部分的厚度。

    Semiconductor device and manufacturing method thereof
    3.
    发明授权
    Semiconductor device and manufacturing method thereof 失效
    半导体装置及其制造方法

    公开(公告)号：US06407419B1

    公开(公告)日：2002-06-18

    申请号：US09362669

    申请日：1999-07-29

    Applicant: Tomonori Okudaira

    Inventor： Tomonori Okudaira

    IPC: H01L27108

    CPC classification number: H01L27/11502 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76888 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/11507 ,  H01L28/40

    Abstract: A semiconductor device preventing contact between a capacitor insulator and a plug material even when an upper surface of the plug is exposed by misregistration in lithography and manufacturing method thereof are obtained. The semiconductor device includes an interlayer insulating film, a conducting plug, a capacitor lower electrode and a capacitor dielectric, and an end portion of the upper surface of the conducting plug has a portion overlapping a vicinity of an outer periphery of the upper surface of the capacitor lower electrode when viewed two-dimensionally. In the vicinity of the end portion of the upper surface of the conducting plug, a chemically inactive member is formed.

    Abstract translation: 即使当在光刻中通过不对准露出插头的上表面时，也可以防止电容器绝缘体和插塞材料之间的接触的半导体器件及其制造方法。 半导体器件包括层间绝缘膜，导电插塞，电容器下电极和电容器电介质，并且导电插塞的上表面的端部具有与所述导电插塞的上表面的外周附近重叠的部分 电容器下电极二维观察。 在导电塞的上表面的端部附近形成化学惰性部件。

    Apparatus for and method of forming thin film by chemical vapor deposition
    5.
    发明授权
    Apparatus for and method of forming thin film by chemical vapor deposition 失效
    通过化学气相沉积法形成薄膜的方法和方法

    公开(公告)号：US06033732A

    公开(公告)日：2000-03-07

    申请号：US70009

    申请日：1998-04-30

    Applicant: Akimasa Yuuki ,  Takaaki Kawahara ,  Tetsuro Makita ,  Mikio Yamamuka ,  Koichi Ono ,  Tomonori Okudaira

    Inventor： Akimasa Yuuki ,  Takaaki Kawahara ,  Tetsuro Makita ,  Mikio Yamamuka ,  Koichi Ono ,  Tomonori Okudaira

    IPC: C23C16/40 ,  C23C16/448 ,  C23C16/52 ,  C23C16/54 ,  C23C14/08

    CPC classification number: C23C16/409 ,  C23C16/4481 ,  C23C16/52 ,  C23C16/54

    Abstract: A method of depositing a thin film on a substrate by chemical vapor deposition (CVD) including feeding a liquid CVD source material, including a solution in which at least one organometallic complex is dissolved in a solvent, at a constant flow rate to a vaporizer while keeping the CVD source material in a liquid state; vaporizing the liquid CVD source material by heating to form a CVD source material gas; and forming a thin film of a metal oxide on a substrate using the CVD material source gas in a reaction chamber, the thin film including at least titanium, including using TTIP and TiO(Dpm).sub.2 together as the organometallic complex.

    Abstract translation: 一种通过化学气相沉积（CVD）在衬底上沉积薄膜的方法，包括将恒定流速的液态CVD源材料（包括其中至少一种有机金属配合物溶解在溶剂中）的溶液进料到蒸发器，同时 保持CVD源材料处于液态; 通过加热蒸发液体CVD源材料以形成CVD源材料气体; 以及使用所述CVD材料源气体在反应室中在基板上形成金属氧化物薄膜，所述薄膜至少包括钛，包括使用TTIP和TiO（Dpm）2作为有机金属络合物。

    Apparatus for forming thin film by chemical vapor deposition
    6.
    发明授权
    Apparatus for forming thin film by chemical vapor deposition 失效
    通过化学气相沉积法形成薄膜的装置

    公开(公告)号：US5776254A

    公开(公告)日：1998-07-07

    申请号：US579495

    申请日：1995-12-27

    Applicant: Akimasa Yuuki ,  Takaaki Kawahara ,  Tetsuro Makita ,  Mikio Yamamuka ,  Koichi Ono ,  Tomonori Okudaira

    Inventor： Akimasa Yuuki ,  Takaaki Kawahara ,  Tetsuro Makita ,  Mikio Yamamuka ,  Koichi Ono ,  Tomonori Okudaira

    IPC: C23C16/40 ,  C23C16/448 ,  C23C16/52 ,  C23C16/54 ,  C23C16/00

    CPC classification number: C23C16/409 ,  C23C16/4481 ,  C23C16/52 ,  C23C16/54

    Abstract: A chemical vapor deposition (CVD) apparatus for depositing a thin film on a substrate by CVD has a material container for containing a liquid CVD source material, a material feeder for feeding the liquid CVD source material to a vaporizer for vaporizing the liquid CVD source material, and a reaction chamber for forming the thin film on the substrate using the CVD source material gas. Both the vaporizer and piping between the vaporizer and the reaction chamber are located in a thermostatic box surrounding the reaction chamber. Thus, the structure of the apparatus is simplified and also the heat efficiency of the apparatus is improved.

    Abstract translation: 用于通过CVD在基板上沉积薄膜的化学气相沉积（CVD）装置具有用于容纳液体CVD源材料的材料容器，用于将液体CVD源材料供给到用于使液体CVD源材料蒸发的蒸发器的材料供料器 以及用于使用CVD源材料气体在基板上形成薄膜的反应室。 蒸发器和反应室之间的蒸发器和管道都位于围绕反应室的恒温箱中。 因此，简化了装置的结构，提高了装置的热效率。

    Semiconductor memory device having a peripheral wall at the boundary region of a memory cell array region and a peripheral circuit region
    7.
    发明授权
    Semiconductor memory device having a peripheral wall at the boundary region of a memory cell array region and a peripheral circuit region 失效
    在存储器单元区域和外围电路区域的边界区域具有外围壁的半导体存储器件

    公开(公告)号：US5218219A

    公开(公告)日：1993-06-08

    申请号：US678872

    申请日：1991-04-04

    Applicant: Natsuo Ajika ,  Hideaki Arima ,  Kaoru Motonami ,  Atsushi Hachisuka ,  Tomonori Okudaira

    Inventor： Natsuo Ajika ,  Hideaki Arima ,  Kaoru Motonami ,  Atsushi Hachisuka ,  Tomonori Okudaira

    IPC: H01L27/10 ,  H01L21/8242 ,  H01L27/108

    CPC classification number: H01L27/10817

    Abstract: A dynamic random access memory (DRAM) is disclosed that can effectively prevent the formation of steps in the boundary region of a memory cell array 101 and a peripheral circuit 102, even in high integrated devices. This DRAM includes a double peripheral wall 20 of peripheral walls 20a and 20b at the boundary region of the memory cell array 101 and the peripheral circuit 102 of a P type silicon substrate 1, extending vertically upwards from the P type silicon substrate 1. The upper surfaces of the devices formed on the memory cell array and the peripheral circuit 102 in forming devices on the memory cell array 101 and the peripheral circuit 102 are substantially planarized, by virture of the double peripheral wall 20, to effectively prevent steps from being generated in the boundary region of the memory cell array 101 and the peripheral circuit 102, even in high integrated devices.

    Abstract translation: 公开了一种动态随机存取存储器（DRAM），其即使在高集成器件中也能够有效地防止存储单元阵列101和外围电路102的边界区域中的步骤的形成。 该DRAM包括在存储单元阵列101的边界区域和P型硅衬底1的外围电路102的外围壁20a和20b的双周壁20，P型硅衬底1从P型硅衬底1垂直向上延伸。 形成在存储单元阵列上的器件的表面和外围电路102在存储单元阵列101和外围电路102上的形成装置中通过双周壁20的病毒基本平坦化，从而有效地防止了在步骤 存储单元阵列101和外围电路102的边界区域，即使在高集成器件中。

    Semiconductor device and manufacturing method thereof
    10.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07517800B2

    公开(公告)日：2009-04-14

    申请号：US11033739

    申请日：2005-01-13

    Applicant: Tomonori Okudaira ,  Takeshi Hayashi ,  Hiroshi Fujiwara ,  Yasushi Fujita ,  Kiyoteru Kobayashi

    Inventor： Tomonori Okudaira ,  Takeshi Hayashi ,  Hiroshi Fujiwara ,  Yasushi Fujita ,  Kiyoteru Kobayashi

    IPC: H01L21/00

    CPC classification number: C23C16/4408 ,  C23C16/34 ,  C23C16/56 ,  H01L21/28088 ,  H01L21/28556 ,  H01L27/10811 ,  H01L27/10894 ,  H01L28/60

    Abstract: A manufacturing method of a semiconductor device including a TiN film, including a deposition step of forming a TiN film by the CVD method, an anneal step of performing a heat treatment to the formed TiN film in an atmosphere of NH3 gas, an NH3 gas purge step of purging NH3 gas, and a step of further repeating the deposition step, the anneal step, and the NH3 gas purge step for at least one time. The deposition step is performed using titanium halide gas and NH3 gas as material gases and with a deposition temperature of 300° C.-450° C. to form the TiN film by a thickness of 1 nm-5 nm for each deposition step. Thus, a semiconductor device in which generation of irregularly grown objects in the TiN film is suppressed and a manufacturing method thereof can be provided.

    Abstract translation: 一种包括TiN膜的半导体器件的制造方法，包括通过CVD法形成TiN膜的沉积步骤，在NH 3气体气氛中对形成的TiN膜进行热处理的退火步骤，NH 3气体吹扫 吹扫NH 3气体的步骤，以及进一步重复沉积步骤，退火步骤和NH 3气体吹扫步骤至少一次的步骤。 沉积步骤使用卤化钛气体和NH 3气体作为原料气体，并且沉积温度为300℃-450℃，以便在每个沉积步骤中形成厚度为1nm-5nm的TiN膜。 因此，可以抑制在TiN膜中产生不规则生长的物体的半导体器件及其制造方法。

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