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    CMOS Image Sensors Implementing Full Frame Digital Correlated Double Sampling with Global Shutter
    1.
    发明申请
    CMOS Image Sensors Implementing Full Frame Digital Correlated Double Sampling with Global Shutter 有权
    CMOS图像传感器实现全帧数字相关双采样与全局快门

    公开(公告)号：US20130258151A1

    公开(公告)日：2013-10-03

    申请号：US13435071

    申请日：2012-03-30

    Applicant: Thomas Ayers ,  Frederick Thomas Brady ,  Jinsuk Kang ,  Ping Wah Wong

    Inventor： Thomas Ayers ,  Frederick Thomas Brady ,  Jinsuk Kang ,  Ping Wah Wong

    IPC: H04N5/335

    CPC classification number: H04N5/378 ,  H04N5/355 ,  H04N5/3575 ,  H04N5/3592

    Abstract: An active pixel CMOS image sensor implements full frame digital correlated double sampling (CDS) with global shutter where all the pixels in the image sensor are reset at substantially the same time and all the pixels in the image sensor integrate incident light at substantially the same time and for substantially the same time duration and correlated double sampling cancellation is performed in the digital domain. In one embodiment, the image sensing device includes an array of light sensing elements, a timing and control circuit and analog-to-digital converters. The timing and control circuit is operative to reset the light sensing elements in the array and to control the array of light sensing elements to integrate incident light. The pixel reset values are cancelled from the corresponding light dependent pixel values for each of the light sensing elements to generate correlated double sampling (CDS) corrected digital output pixel values.

    Abstract translation: 有源像素CMOS图像传感器实现具有全局快门的全帧数字相关双采样（CDS），其中图像传感器中的所有像素基本上同时复位，并且图像传感器中的所有像素基本上同时地集成入射光 并且对于基本上相同的持续时间并且在数字域中执行相关的双采样消除。 在一个实施例中，图像感测装置包括光敏元件阵列，定时和控制电路以及模 - 数转换器。 定时和控制电路用于复位阵列中的光感测元件并且控制光感测元件的阵列以集成入射光。 对于每个光感测元件，像素复位值被从相应的依赖于光的像素值中消除以产生相关双倍采样（CDS）校正的数字输出像素值。

    Compositions and Methods for Treating Polyglutamine-Expansion Neurodegenerative Diseases
    3.
    发明申请
    Compositions and Methods for Treating Polyglutamine-Expansion Neurodegenerative Diseases 审中-公开
    治疗聚谷氨酰胺扩张神经退行性疾病的组合物和方法

    公开(公告)号：US20090252717A1

    公开(公告)日：2009-10-08

    申请号：US12302349

    申请日：2007-05-29

    Applicant: Scott Thomas Brady ,  Gerardo Andres Morfini

    Inventor： Scott Thomas Brady ,  Gerardo Andres Morfini

    IPC: A61K38/45 ,  G01N33/53 ,  A61P25/28

    CPC classification number: A61K38/1709 ,  A61K31/4439 ,  C12Q1/48 ,  G01N2333/91205 ,  G01N2500/00

    Abstract: The invention relates to methods for stimulating fast axonal transport in polyglutamine expansion diseases and treating polyglutamine expansion diseases by inhibiting SAPK-dependent phosphorylation of kinesin. The present invention also provides methods for identifying agents which inhibit the phosphorylation of the kinesin, as well as methods for monitoring treatment of a polyglutamine expansion disease based on the phosphorylation of serine 176 of kinesin-1A or kinesin-1C, or serine 175 of kinesin-1B.

    Abstract translation: 本发明涉及通过抑制驱动蛋白的SAPK依赖性磷酸化来刺激多谷氨酰胺扩张疾病中的快速轴突运输和治疗聚谷氨酰胺扩张疾病的方法。 本发明还提供了用于鉴定抑制驱动蛋白磷酸化的药剂的方法，以及基于驱动蛋白1A或驱动蛋白-1C的丝氨酸176或驱动蛋白丝氨酸175的磷酸化来监测多谷氨酰胺扩张疾病的治疗方法 -1B。

    Multi-node media server that provides video to a plurality of terminals from a single buffer when video requests are close in time
    4.
    发明授权
    Multi-node media server that provides video to a plurality of terminals from a single buffer when video requests are close in time 失效
    当视频请求在时间上接近时，从单个缓冲器向多个终端提供视频的多节点媒体服务器

    公开(公告)号：US5808607A

    公开(公告)日：1998-09-15

    申请号：US418542

    申请日：1995-04-07

    Applicant: James Thomas Brady ,  Linda Marie Duyanovich ,  Boris Klots

    Inventor： James Thomas Brady ,  Linda Marie Duyanovich ,  Boris Klots

    IPC: H04N5/78 ,  G09G5/00 ,  H04N5/91 ,  H04N7/173 ,  H04N7/14

    CPC classification number: H04N7/17336

    Abstract: A multi-node video server system in accordance with the invention comprises disk storage associated with a first node which stores at least a portion of a video presentation in the form of plural data blocks, each data block comprising a viewing time segment of the presentation. RAM buffer in a second node receives and stores data blocks of the video presentation from the disk storage in the first node, upon an initial request by a first viewing terminal to view a portion of the video presentation. A communication module in the second node outputs the data blocks, as an isochronous data stream, to requesting terminals. A host controller is coupled to the video server nodes and receives requests from viewing terminals for the video presentation. The host controller causes the communication module in the second node to connect to a viewing terminal which renders the initial request. Additional viewing terminals requesting the same video presentation are also connected to the same communication module if their requests are received within a time period from the initial request that does not exceed a sum of viewing time segments represented by data blocks stored in the RAM buffer. In this manner, both the first requester and subsequent requesting viewing terminals are enabled to receive the audiovisual presentation directly from the same buffer without requiring additional disk accesses for the subsequent viewers. Avoidance of additional internal video server communications is thus achieved.

    Abstract translation: 根据本发明的多节点视频服务器系统包括与第一节点相关联的磁盘存储器，其以多个数据块的形式存储视频呈现的至少一部分，每个数据块包括呈现的观看时段。 在第一节点的初始请求中，第二节点中的RAM缓冲器接收并存储来自第一节点中的磁盘存储器的视频呈现的数据块，以便在第一观看终端初始请求时观看视频呈现的一部分。 第二节点中的通信模块将数据块作为同步数据流输出到请求终端。 主机控制器耦合到视频服务器节点并且从视频终端接收用于视频呈现的请求。 主机控制器使得第二节点中的通信模块连接到呈现初始请求的观看终端。 如果在从不超过存储在RAM缓冲器中的数据块表示的观看时间段的总和的初始请求的时间段内接收到请求相同的视频呈现的附加观看终端也连接到相同的通信模块。 以这种方式，第一请求者和随后的请求查看终端都能够直接从同一缓冲区接收视听呈现，而不需要对后续观看者的附加磁盘访问。 因此实现了避免额外的内部视频服务器通信。

    Dynamic memory allocation that enalbes efficient use of buffer pool memory segments
    5.
    发明授权
    Dynamic memory allocation that enalbes efficient use of buffer pool memory segments 失效
    动态内存分配，有效利用缓冲池内存段

    公开(公告)号：US5784698A

    公开(公告)日：1998-07-21

    申请号：US568180

    申请日：1995-12-05

    Applicant: James Thomas Brady ,  Damon W. Finney ,  Michael Howard Hartung ,  Michael Anthony Ko ,  Noah R. Mendelsohn ,  Jaishankar Moothedath Menon ,  David R. Nowlen

    Inventor： James Thomas Brady ,  Damon W. Finney ,  Michael Howard Hartung ,  Michael Anthony Ko ,  Noah R. Mendelsohn ,  Jaishankar Moothedath Menon ,  David R. Nowlen

    IPC: G06F9/50 ,  G06F12/02

    CPC classification number: G06F9/5016 ,  G06F12/023

    Abstract: An apparatus for dynamically allocating memory includes a processor, a free buffer pool memory and a control memory which stores control block data structures. The control block data structures enable a segmentation of the free buffer pool memory into a series of free buffer pools, each free buffer pool comprising plural identical size buffers, each succeeding free buffer pool including a larger buffer size than a preceding free buffer pool. A selection size parameter for a given free buffer pool is a value that is larger than the buffer size comprising the given free buffer pool, but less than a next larger buffer size in the next of the series of free buffer pools. A memory allocation procedure responds to a request from an executing procedure for allocation of buffer space by: (i) allocating a buffer from a free buffer pool memory whose associated selection size parameter is a next larger value than the buffer space that was requested; (ii) determining a difference between the allocated buffer size and the requested buffer space to find an unfulfilled amount of the requested buffer space; (iii) allocating a buffer from a free buffer pool memory whose selection size parameter is a next larger value, among selection size parameters, than the unfulfilled amount; and (iv) repeating ii and iii until the memory allocation procedure determines that there is no unfulfilled amount of the requested buffer space. The apparatus further includes "quickcell" memory which is allocated without use of control block data structures.

    Abstract translation: 用于动态分配存储器的装置包括处理器，空闲缓冲池存储器和存储控制块数据结构的控制存储器。 控制块数据结构使得可以将空闲缓冲池存储器分割成一系列空闲缓冲池，每个空闲缓冲池包括多个相同大小的缓冲器，每个随后的空闲缓冲池包括比先前的空闲缓冲池大的缓冲器大小。 给定可用缓冲池的选择大小参数是大于包含给定可用缓冲池的缓冲区大小的值，但小于下一个空闲缓冲池系列中的下一个较大缓冲区大小的值。 存储器分配过程响应来自用于分配缓冲器空间的执行过程的请求，其通过以下步骤来响应：（i）从相关选择大小参数是比所请求的缓冲空间更大的值的空闲缓冲池存储器分配缓冲器; （ii）确定所分配的缓冲器大小与所请求的缓冲器空间之间的差异，以找到所请求的缓冲空间的未实现量; （iii）从选择大小参数中选择大小参数为选择大小参数的空闲缓冲池存储器中分配缓冲器，而不是未实现的量; 和（iv）重复ii和iii，直到存储器分配过程确定没有未实现的所请求的缓冲空间量。 该装置还包括在不使用控制块数据结构的情况下分配的“快速小区”存储器。

    Reconfigurable data storage system
    6.
    发明授权
    Reconfigurable data storage system 失效
    可重构数据存储系统

    公开(公告)号：US5758050A

    公开(公告)日：1998-05-26

    申请号：US614460

    申请日：1996-03-12

    Applicant: James Thomas Brady ,  Paul T. Burton ,  Alden B. Johnson ,  Jaishankar Moothedath Menon ,  Steven Gerdt

    Inventor： James Thomas Brady ,  Paul T. Burton ,  Alden B. Johnson ,  Jaishankar Moothedath Menon ,  Steven Gerdt

    IPC: G06F12/00

    CPC classification number: G06F3/0631 ,  G06F3/0607 ,  G06F3/0689

    Abstract: A system for managing data storage devices of a data storage subsystem. A data storage system includes a controller coupled to multiple data storage devices. In response to a request, the controller allocates the devices' storage space into a number of storage partitions or "virtual devices." The request specifies the size and function mode for each storage partition. Each storage partition, having the requested size, is operated according to its requested function mode. This involves mapping access commands, which specify virtual addresses, to the proper physical addresses of the appropriate data storage devices.

    Abstract translation: 一种用于管理数据存储子系统的数据存储设备的系统。 数据存储系统包括耦合到多个数据存储设备的控制器。 响应于请求，控制器将设备的存储空间分配到多个存储分区或“虚拟设备”中。 请求指定每个存储分区的大小和功能模式。 具有请求的大小的每个存储分区根据其所请求的功能模式进行操作。 这涉及将指定虚拟地址的访问命令映射到适当的数据存储设备的正确物理地址。

    Efficient system for predicting and processing storage subsystem failure
    7.
    发明授权
    Efficient system for predicting and processing storage subsystem failure 失效

    公开(公告)号：US5717850A

    公开(公告)日：1998-02-10

    申请号：US614427

    申请日：1996-03-12

    Applicant: Norman Apperley ,  James Thomas Brady ,  Steven Gerdt ,  Alden B. Johnson

    Inventor： Norman Apperley ,  James Thomas Brady ,  Steven Gerdt ,  Alden B. Johnson

    IPC: G06F3/06 ,  G06F11/00 ,  G06F11/20 ,  G11B20/18

    CPC classification number: G06F11/2094 ,  G06F11/008 ,  G06F11/1088

    Abstract: Predictive failure analysis of a storage subsystem is efficiently conducted and data quickly recovered from a failed Read operation. This may be implemented in a storage system including a host coupled to a supervising processor that couples to a parity-equipped RAID storage subsystem having multiple HDAs each including an HDA controller and at least one storage medium. In one embodiment, when an HDA experiences an error during a Read attempt, the HDA transmits a recovery alert signal to the supervising processor; then, the processor and HDA begin remote and local recovery processes in parallel. The first process to complete provides the data to the host, and the second process is aborted. In another embodiment, an HDA's PFA operations are restricted to idle times of the HDA. A different embodiment limits HDA performance of PFA to times when the processor is conducting data reconstruction. Another embodiment monitors HDA errors at the supervisory processor level, initiating an HDA's PFA operations when errors at that HDA have a certain characteristic, such as a predetermined frequency of occurrence.

    Log structured array storage subsystem using LSA directory and LSA sub-directory stored in different storage media
    8.
    发明授权
    Log structured array storage subsystem using LSA directory and LSA sub-directory stored in different storage media 失效
    使用LSA目录和存储在不同存储介质中的LSA子目录来记录结构化阵列存储子系统

    公开(公告)号：US5671390A

    公开(公告)日：1997-09-23

    申请号：US449385

    申请日：1995-05-23

    Applicant: James Thomas Brady ,  Alden B. Johnson ,  John Chi-Shing Lui ,  Jaishankar Moothedath Menon ,  Shin-Yuan Tzou

    Inventor： James Thomas Brady ,  Alden B. Johnson ,  John Chi-Shing Lui ,  Jaishankar Moothedath Menon ,  Shin-Yuan Tzou

    IPC: G06F3/06 ,  G11B27/11 ,  G11B27/32 ,  G06F17/30

    CPC classification number: G06F3/0601 ,  G11B27/11 ,  G11B27/329 ,  G06F2003/0697

    Abstract: A method and means are disclosed in a Log Structure Array (LSA) storage subsystem for managing said subsystem without a need for an access to a complete LSA directory in a RAM. This object is achieved by maintaining (1) a subset of the LSA directory (referred to as LSA sub-directory) in a RAM where the LSA sub-directory comprises the logical track address of a predetermined number of most recently accessed logical tracks; (2) a journal of changes to the LSA directory which is maintained on a different power boundary than the LSA directory power boundary; and, (3) an array of bit maps, one bit map per segment which is used for fast garbage collection thus eliminating the need for having an access to a complete LSA directory in a RAM during garbage collection.

    Abstract translation: 在用于管理所述子系统的日志结构阵列（LSA）存储子系统中公开了一种方法和装置，而不需要访问RAM中的完整LSA目录。 该目的通过在RAM中维护（1）LSA目录（称为LSA子目录）的子集来实现，其中LSA子目录包括预定数量的最近访问的逻辑磁道的逻辑磁道地址; （2）与LSA目录电源边界保持不同电源边界的LSA目录更改日志; 和（3）位图阵列，每个片段使用一个位图，用于快速垃圾收集，从而无需在垃圾收集期间访问RAM中的完整LSA目录。

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