Abstract:
A solid-state imaging device comprises a first pixel group includes a first photoelectric conversion unit that converts into electric charges reflection light pulses from an object irradiated with an irradiation light pulse, a first electric charge accumulation unit accumulating the electric charges in synchrony with turning on the irradiation light pulses, and a first reset unit resetting the electric charges; and a second pixel group includes a second photoelectric conversion unit that converts the reflection light into electric charges, a second electric charge accumulation unit that accumulates the electric charges synchronously with a switching the irradiation light pulses from on to off, and a second reset unit that releases a reset of the electric charges converted by the second photoelectric conversion unit.
Abstract:
An image sensor may include one or more pixels having a charge steering structure that may selectively route charge from a photodiode to increase the dynamic range of the pixel. The charge steering structure may be a coupled gate structure that routes overflow charge to a voltage supply and to one or more integrating storage structures during an exposure period. The charge steering structure may be two integrating storage structures directly connected to the photodiode that each integrate charge generated by the photodiode in an alternating fashion during an exposure period. Storage structures and transistors within the charge steering structure may receive control signals, which may be asserted in a mutually exclusive manner. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.
Abstract:
An image sensor may include an array of image sensor pixels. Each image sensor pixel may have signal storage capabilities implemented through a write-back supply line and a control transistor for the supply line. Each image sensor pixel may output pixel values over column lines to switching circuitry. The switching circuitry may route the pixel values to signal processing circuitry. The signal processing circuitry may perform analog and/or digital processing operations utilizing analog circuits or pinned diode devices for image signal processing on the pixel values to output processed pixel values. The processing circuitry may send the processed pixel values back to the array. This allows the array to act as memory circuitry to support processing operations on processing circuitry in close proximity to the array. Configured this way, signal processing can be performed in close proximity to the array without having to move pixel signals to peripheral processing circuitry.
Abstract:
An image sensor may include an array of image sensor pixels. Each pixel may have a photodiode, a charge storage region, and a charge overflow circuit. The charge storage region may be used to operate the image sensor array in global shutter mode. During high light level illumination, the charge overflow circuit may divert charge away from the photodiode such that only a predetermined portion of the accumulated charge remains in the photodiode. During low light level illumination all of the accumulated charge may be stored in the pixel photodiode. The charge overflow circuit may include a transistor and a resistor or capacitor. By implementing a charge overflow circuit, the size of the charge storage region may be reduced while still preserving the high dynamic range and low noise of the image sensor during all light illumination conditions.
Abstract:
A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged on a semiconductor substrate, in which each of the pixels includes a photoelectric converting portion and a charge converting portion for converting a charge generated by photoelectric conversion into a pixel signal and blooming is suppressed by controlling a substrate voltage of the semiconductor substrate.
Abstract:
A pixel comprises a high-response photodiode that collects photocharge, a first transfer gate that enables the charge to be transferred off the high-response photodiode, completely emptying it onto a low-response photodiode, a second transfer gate enables the charge to be transferred off the low-response photodiode, completely emptying it onto floating diffusion, a third transfer gate for anti-blooming; the floating diffusion collects the transferred charge creating a change of voltage, a means of resetting the floating diffusion. A source-follower is modulated by the voltage on floating diffusion to control bit-line voltage and column-amplifier output. In examples, photocharge is integrated onto both the high-response photodiode and onto the low-response photodiode. The column readout circuit consists of a column amplifier that uses capacitors to set the amplifier gain, three sampling capacitors used as analog memory and for correlated double sampling, and a comparator that assists in providing the final output.
Abstract:
An image sensor is provided including a pixel array, a correlated double sampling (CDS) unit, an analog-digital converting (ADC) unit, a control unit, and an overflow power voltage control unit. The pixel array includes at least one unit pixel that generates accumulated charges corresponding to incident light in a photoelectric conversion period and outputs an analog signal based on the accumulated charges in a readout period. The CDS unit generates an image signal by performing a CDS operation on the analog signal. An ADC unit converts the image signal into a digital signal. A control unit controls the pixel array, the CDS unit, and the ADC unit. An overflow power voltage control unit controls an overflow power voltage to have a low voltage level in the photoelectric conversion period and controls the overflow power voltage to have a high voltage level in the readout period.
Abstract:
A single pixel sensor is provided, comprising a photo sensor configured to convert light into proportional signals; a charge storage configured to accumulate, repeatedly, a plurality of the signals converted by the photosensor; a first transistor coupled between a pixel voltage terminal and the photosensor; a second transistor coupled between the photosensor and the charge storage; and a readout circuit coupled between the charge storage and an output channel, wherein: the single pixel sensor is configured to carry out the repeated accumulations of signals multiple times per each readout by the readout circuit, the single pixel sensor is configured to synchronously convert reflections of light emitted by an associated illuminator or to convert light emitted by non-associated flickering light sources, and wherein the single pixel sensor is backside illuminated by the light.
Abstract:
In a solid-state imaging device 1, an overflow gate (OFG) 5 has a predetermined electric resistance value, while voltage application units 161 to 165 are electrically connected to the OFG 5 at connecting parts 171 to 175. Therefore, when voltage values V1 to V5 applied to the connecting parts 171 to 175 by the voltage application units 161 to 165 are adjusted, the OFG 5 can yield higher and lower voltage values in its earlier and later stage parts, respectively. As a result, the barrier level (potential) becomes lower and higher in the earlier and later stage parts, so that all the electric charges generated in an earlier stage side region of photoelectric conversion units 2 can be caused to flow out to an overflow drain (OFD) 4, whereby only the electric charges generated in a later stage side region of the photoelectric conversion units 2 can be TDI-transferred.
Abstract:
A method, apparatus and system are described providing a high dynamic range pixel. An integration period has multiple sub-integration periods during which charges are accumulated in a photosensor and repeatedly transferred to a storage node, where the charges are accumulated for later transfer to another storage node for output.