公开(公告)号：US07778617B2

公开(公告)日：2010-08-17

申请号：US11898614

申请日：2007-09-13

申请人： Ramon Alejandro Gomez ,  Stephen Krafft ,  Tommy Yu

发明人： Ramon Alejandro Gomez ,  Stephen Krafft ,  Tommy Yu

IPC分类号： H04B1/06

CPC分类号： H03G3/3068 ,  H03G1/0088

摘要： In an embodiment, a receiver for processing a RF input signal having a variable signal strength includes an RF amplifier, an IF amplifier, and a controller. The RF amplifier is configured to receive and amplify the RF input signal. The IF amplifier is coupled to an output of the RF amplifier. The controller controls gains of the RF amplifier and the IF amplifier during times of falling signal strength. A gain of the IF amplifier is increased as the signal strength falls until a first amplitude threshold is reached for the falling signal strength. If the signal strength falls beyond the first threshold, a gain of the RF amplifier is increased until a second amplitude threshold is reached. The second amplitude threshold is lower than the first amplitude threshold. If the signal strength falls below the second amplitude threshold, the gain of the IF amplifier is further increased.

摘要翻译： 在一个实施例中，用于处理具有可变信号强度的RF输入信号的接收器包括RF放大器，IF放大器和控制器。 RF放大器被配置为接收和放大RF输入信号。 IF放大器耦合到RF放大器的输出。 控制器在信号强度下降期间控制RF放大器和IF放大器的增益。 随着信号强度下降，IF放大器的增益增加，直到达到下降信号强度的第一幅度阈值为止。 如果信号强度超过第一阈值，则RF放大器的增益增加，直到达到第二幅度阈值。 第二幅度阈值低于第一幅度阈值。 如果信号强度低于第二幅度阈值，则IF放大器的增益进一步增加。

公开(公告)号：US20080242249A1

公开(公告)日：2008-10-02

申请号：US11898614

申请日：2007-09-13

申请人： Ramon Alejandro Gomez ,  Stephen Krafft ,  Tommy Yu

发明人： Ramon Alejandro Gomez ,  Stephen Krafft ,  Tommy Yu

IPC分类号： H04B1/06

CPC分类号： H03G3/3068 ,  H03G1/0088

摘要： In an embodiment, a receiver for processing a RF input signal having a variable signal strength includes an RF amplifier, an IF amplifier, and a controller. The RF amplifier is configured to receive and amplify the RF input signal. The IF amplifier is coupled to an output of the RF amplifier. The controller controls gains of the RF amplifier and the IF amplifier during times of falling signal strength. A gain of the IF amplifier is increased as the signal strength falls until a first amplitude threshold is reached for the falling signal strength. If the signal strength falls beyond the first threshold, a gain of the RF amplifier is increased until a second amplitude threshold is reached. The second amplitude threshold is lower than the first amplitude threshold. If the signal strength falls below the second amplitude threshold, the gain of the IF amplifier is further increased.

摘要翻译： 在一个实施例中，用于处理具有可变信号强度的RF输入信号的接收器包括RF放大器，IF放大器和控制器。 RF放大器被配置为接收和放大RF输入信号。 IF放大器耦合到RF放大器的输出。 控制器在信号强度下降期间控制RF放大器和IF放大器的增益。 随着信号强度下降，IF放大器的增益增加，直到达到下降信号强度的第一幅度阈值为止。 如果信号强度超过第一阈值，则RF放大器的增益增加，直到达到第二幅度阈值。 第二幅度阈值低于第一幅度阈值。 如果信号强度低于第二幅度阈值，则IF放大器的增益进一步增加。

公开(公告)号：US20060036819A1

公开(公告)日：2006-02-16

申请号：US11231635

申请日：2005-09-21

申请人： Hiroshi Suzuki ,  Stephen Krafft

发明人： Hiroshi Suzuki ,  Stephen Krafft

IPC分类号： G06F13/28

CPC分类号： H04L1/005 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2767 ,  H03M13/2771 ,  H03M13/2785 ,  H03M13/2957 ,  H03M13/4161 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

摘要： Interleaver for iterative decoder. A memory management scheme allows for single plane/single port memory devices to be used by the interleaver. The design is adaptable to soft-in soft-out (SISO) decoders that perform iterative decoding. The interleaver may be implemented within communication devices that implement two distinct SISOs that operate cooperatively or within communication devices that employ a single SISO (in a recycled embodiment) that functionally performs the analogous decoding operations that would be performed by the two distinct SISO implementation. The use of single plane/single port memory devices by the interleaver allows for a great deal of savings from many perspectives: the sizes of the required interleaver memory and the interleaver pattern memory are both cut in half using this approach, and a cost savings may also be realized, in that, cheaper, slower memories may be used since each respective interleaver memory is read only every other cycle.

公开(公告)号：US20070113149A1

公开(公告)日：2007-05-17

申请号：US11586716

申请日：2006-10-26

申请人： Stephen Krafft ,  Daniel Richard

发明人： Stephen Krafft ,  Daniel Richard

IPC分类号： H03M13/00

CPC分类号： H03M13/1105 ,  H03M13/2975 ,  H03M13/3753

摘要： An apparatus and method for reducing an average power consumed by an iterative decoder. A power savings loop coupled to the iterative decoder includes an averager, a comparator and an integrator. The averager receives an iteration count from the iterative decoder and determines an average iteration count of the iterative decoder. The comparator compares the average iteration count to a threshold. The threshold corresponds to a noise level that exceeds a level of noise associated with a quasi-error free (QEF) operating point of the iterative decoder. When the average iteration count exceeds the threshold, the integrator produces an output signal that lowers the maximum number of permissible iterations the iterative decoder can conduct. As a result, the average iteration count is lowered, thereby reducing the average power consumed by the iterative decoder.

摘要翻译： 一种降低迭代解码器消耗的平均功耗的装置和方法。 耦合到迭代解码器的省电回路包括平均器，比较器和积分器。 平均器从迭代解码器接收迭代计数，并确定迭代解码器的平均迭代次数。 比较器将平均迭代次数与阈值进行比较。 阈值对应于超过与迭代解码器的无错误（QEF）操作点相关联的噪声水平的噪声电平。 当平均迭代次数超过阈值时，积分器产生一个输出信号，降低迭代解码器可以执行的最大允许迭代次数。 结果，平均迭代次数降低，从而降低了迭代解码器消耗的平均功耗。

公开(公告)号：US20070053468A1

公开(公告)日：2007-03-08

申请号：US11593273

申请日：2006-11-06

申请人： Tommy Yu ,  Steven Jaffe ,  Stephen Krafft

发明人： Tommy Yu ,  Steven Jaffe ,  Stephen Krafft

IPC分类号： H04L27/22

CPC分类号： H04L27/00

摘要： Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.

摘要翻译： 正交接收机采样架构。 信号ADC为I和Q流执行模数转换。 模拟MUX在适当的时间选择适当的I和Q基带模拟输入流输入ADC。 还可以采用数字滤波器来补偿在I和Q信道的样本之间的任何引入的延迟，当寻求恢复已被发送到使用该正交接收器架构和/或信号处理的通信接收机的符号时。 在一个实施例中，如果ADC以基本上是I和Q通道的采样率的两倍的速率被计时，则在ADC的输出处的数字I和数字Q数据之间将存在二分之一采样时钟延迟。 然后在解调器处理输入信号之前去除该延迟以恢复发送的符号。

公开(公告)号：US08483122B2

公开(公告)日：2013-07-09

申请号：US12409461

申请日：2009-03-23

申请人： Mark Dale ,  Hebsgaard Anders ,  David Hartman ,  Alan Kwentus ,  Steven Jaffe ,  Kelly Cameron ,  Stephen Krafft ,  Alan Gin ,  Jen-chieh (Jack) Chien ,  Dorothy Lin ,  Rocco Brescia ,  Joyce Wang

发明人： Mark Dale ,  Hebsgaard Anders ,  David Hartman ,  Alan Kwentus ,  Steven Jaffe ,  Kelly Cameron ,  Stephen Krafft ,  Alan Gin ,  Jen-chieh (Jack) Chien ,  Dorothy Lin ,  Rocco Brescia ,  Joyce Wang

IPC分类号： H04B7/212

CPC分类号： H04L47/29 ,  H04B7/18582 ,  H04L12/2801 ,  H04L47/10 ,  H04L47/263 ,  H04N21/2383 ,  H04N21/2385 ,  H04N21/4382 ,  H04N21/44209 ,  H04N21/6143 ,  H04N21/6193 ,  H04N21/6377 ,  H04N2007/17381

摘要： In a DOCSIS based satellite gateway data is transmitted over a single downstream channel, at different throughput rates. Data destined for each subscriber/receiver is assigned a throughput rate depending upon the downstream signal quality of that subscriber/receiver. To accomplish this, the downstream DOCSIS MAC data is parsed to extract DOCSIS packets. The DOCSIS packets are then loaded into packet queues based on an identifier within such packets such as the MAC destination address or SID. Each of the queues represents a bandwidth efficiency or throughput rate that can be currently tolerated by specific subscribers based on the current signal quality being experienced at the subscriber location. A PHY-MAP describing the downstream data structure to be transmitted and inserted into the downstream data. Data is extracted from the packet queues in queue blocks as defined by the PHY-MAP. The queue blocks are modulated with transmission parameters appropriate for each queue block and transmitted to the DOCSIS based satellite modems. The satellite modems extract the PHY-MAP from the downstream data and use the information contained in it to demodulate and decode the queue for which they have sufficient downstream signal quality. Satellite modems measure and transmit downstream signal quality to the satellite gateway to be used to assigned traffic to the appropriate queues.

公开(公告)号：US20070256001A1

公开(公告)日：2007-11-01

申请号：US11823225

申请日：2007-06-27

申请人： Hiroshi Suzuki ,  Alan Kwentus ,  Stephen Krafft ,  Kevin Eddy ,  Steven Jaffe

发明人： Hiroshi Suzuki ,  Alan Kwentus ,  Stephen Krafft ,  Kevin Eddy ,  Steven Jaffe

IPC分类号： H03M13/00

CPC分类号： H04L1/0057 ,  H03M13/114 ,  H03M13/2927 ,  H03M13/2948 ,  H04B7/18582 ,  H04L1/0003 ,  H04L1/0009 ,  H04L1/0026 ,  H04L1/0039 ,  H04L1/0045 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/007 ,  H04L1/0072 ,  H04L1/0075

摘要： FEC (Forward Error Correction) decoder with dynamic parameters. A novel means by which FEC parameters may be encoded into, and subsequently extracted from, a signal stream to allow for adaptive changing of any 1 or more operational parameters that govern communications across a communication channel. FEC parameters are encoded directly into a data frame such that the data frame is treated identical to all other data frames within the signal stream. When the data frame actually includes FEC parameters, it is characterized as a CP (Control Packet) type. For example, when decoding an MPEG stream, an MPEG block that includes FEC parameters, that MPEG block is characterized as a CP MPEG block. The means by which FEC parameters are encoded and extracted from the signal stream allows for much easier adaptive modification of the manner by which signal are encoded, modulated, and processed within a communication system.

摘要翻译： 具有动态参数的FEC（前向纠错）解码器。 FEC参数可以被编码到信号流中并随后从信号流中提取的新颖手段，以允许对通过通信信道进行通信的任何一个或多个操作参数进行自适应改变。 FEC参数被直接编码到数据帧中，使得数据帧被视为与信号流内的所有其他数据帧相同。 当数据帧实际上包含FEC参数时，它被表征为CP（控制分组）类型。 例如，当解码MPEG流时，包括FEC参数的MPEG块，该MPEG块被表征为CP MPEG块。 从信号流中对FEC参数进行编码和提取的手段允许在通信系统内对信号进行编码，调制和处理的方式进行更容易的自适应修改。

公开(公告)号：US20070092022A1

公开(公告)日：2007-04-26

申请号：US11586667

申请日：2006-10-26

申请人： Stephen Krafft ,  Daniel Richard

发明人： Stephen Krafft ,  Daniel Richard

IPC分类号： H04L27/10

CPC分类号： H04L27/10

摘要： An integrated frequency-shift keying (FSK) transceiver fabricated on an integrated circuit (IC) chip. The integrated FSK transceiver provides a bidirectional exchange of information between a satellite set-top box converter or modem and one or more outdoor units (ODUs). The integrated FSK transceiver includes a binary FSK receiver coupled to one or more translation modules of associated satellite antennas. The FSK receiver provides management information transmitted from the translation modules to a baseband interface. The baseband interface provides connectivity between the translation modules and the satellite converter set-top box and/or data modem. A binary FSK transmitter transmits management information generated by the baseband interface to the translation modules.

摘要翻译： 在集成电路（IC）芯片上制造的集成频移键控（FSK）收发器。 集成的FSK收发器在卫星机顶盒转换器或调制解调器与一个或多个室外单元（ODU）之间提供双向信息交换。 集成的FSK收发器包括耦合到相关卫星天线的一个或多个翻译模块的二进制FSK接收机。 FSK接收机提供从转换模块发送到基带接口的管理信息。 基带接口提供翻译模块和卫星转换器机顶盒和/或数据调制解调器之间的连接。 二进制FSK发送器将由基带接口生成的管理信息发送到转换模块。

公开(公告)号：US20050138521A1

公开(公告)日：2005-06-23

申请号：US10916919

申请日：2004-08-12

申请人： Hiroshi Suzuki ,  Alan Kwentus ,  Stephen Krafft ,  Kevin Eddy ,  Steven Jaffe

发明人： Hiroshi Suzuki ,  Alan Kwentus ,  Stephen Krafft ,  Kevin Eddy ,  Steven Jaffe

IPC分类号： H03M13/00 ,  H04L1/00 ,  H04L1/18

CPC分类号： H04L1/0057 ,  H03M13/114 ,  H03M13/2927 ,  H03M13/2948 ,  H04B7/18582 ,  H04L1/0003 ,  H04L1/0009 ,  H04L1/0026 ,  H04L1/0039 ,  H04L1/0045 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/007 ,  H04L1/0072 ,  H04L1/0075

摘要： FEC (Forward Error Correction) decoder with dynamic parameters. A novel means by which FEC parameters may be encoded into, and subsequently extracted from, a signal stream to allow for adaptive changing of any 1 or more operational parameters that govern communications across a communication channel. FEC parameters are encoded directly into a data frame such that the data frame is treated identical to all other data frames within the signal stream. When the data frame actually includes FEC parameters, it is characterized as a CP (Control Packet) type. For example, when decoding an MPEG stream, an MPEG block that includes FEC parameters, that MPEG block is characterized as a CP MPEG block. The means by which FEC parameters are encoded and extracted from the signal stream allows for much easier adaptive modification of the manner by which signal are encoded, modulated, and processed within a communication system.

摘要翻译： 具有动态参数的FEC（前向纠错）解码器。 FEC参数可以被编码到信号流中并随后从信号流中提取的新颖手段，以允许对通过通信信道进行通信的任何一个或多个操作参数进行自适应改变。 FEC参数被直接编码到数据帧中，使得数据帧被视为与信号流内的所有其他数据帧相同。 当数据帧实际上包含FEC参数时，它被表征为CP（控制分组）类型。 例如，当解码MPEG流时，包括FEC参数的MPEG块，该MPEG块被表征为CP MPEG块。 从信号流中对FEC参数进行编码和提取的手段允许在通信系统内对信号进行编码，调制和处理的方式进行更容易的自适应修改。

公开(公告)号：US20100074167A1

公开(公告)日：2010-03-25

申请号：US12409461

申请日：2009-03-23

申请人： Mark Dale ,  Anders Hebsgaard ,  David Hartman ,  Alan Kwentus ,  Steven Jaffe ,  Kelly Cameron ,  Stephen Krafft ,  Alan Gin ,  Jen-chieh (Jack) Chien ,  Dorothy Lin ,  Rocco Brescia ,  Joyce Wang

发明人： Mark Dale ,  Anders Hebsgaard ,  David Hartman ,  Alan Kwentus ,  Steven Jaffe ,  Kelly Cameron ,  Stephen Krafft ,  Alan Gin ,  Jen-chieh (Jack) Chien ,  Dorothy Lin ,  Rocco Brescia ,  Joyce Wang

IPC分类号： H04B7/212 ,  H04L12/56

CPC分类号： H04L47/29 ,  H04B7/18582 ,  H04L12/2801 ,  H04L47/10 ,  H04L47/263 ,  H04N21/2383 ,  H04N21/2385 ,  H04N21/4382 ,  H04N21/44209 ,  H04N21/6143 ,  H04N21/6193 ,  H04N21/6377 ,  H04N2007/17381

摘要： In a DOCSIS based satellite gateway data is transmitted over a single downstream channel, at different throughput rates. Data destined for each subscriber/receiver is assigned a throughput rate depending upon the downstream signal quality of that subscriber/receiver. To accomplish this, the downstream DOCSIS MAC data is parsed to extract DOCSIS packets. The DOCSIS packets are then loaded into packet queues based on an identifier within such packets such as the MAC destination address or SID. Each of the queues represents a bandwidth efficiency or throughput rate that can be currently tolerated by specific subscribers based on the current signal quality being experienced at the subscriber location. A PHY-MAP describing the downstream data structure to be transmitted and inserted into the downstream data. Data is extracted from the packet queues in queue blocks as defined by the PHY-MAP. The queue blocks are modulated with transmission parameters appropriate for each queue block and transmitted to the DOCSIS based satellite modems. The satellite modems extract the PHY-MAP from the downstream data and use the information contained in it to demodulate and decode the queue for which they have sufficient downstream signal quality. Satellite modems measure and transmit downstream signal quality to the satellite gateway to be used to assigned traffic to the appropriate queues.

摘要翻译： 在基于DOCSIS的卫星网关中，数据通过单个下游信道以不同的吞吐率传输。 根据该用户/接收机的下行信号质量为目的地为每个用户/接收机指定的数据被分配吞吐率。 为了实现这一点，下游DOCSIS MAC数据被解析以提取DOCSIS分组。 DOCSIS分组然后基于诸如MAC目的地址或SID之类的分组内的标识符加载到分组队列中。 每个队列表示基于当前在用户位置处经历的信号质量，特定订户可以容忍的带宽效率或吞吐率。 描述要发送并插入下游数据的下游数据结构的PHY-MAP。 从PHY-MAP定义的队列块中的数据包队列中提取数据。 使用适合于每个队列块的传输参数调制队列块，并将其发送到基于DOCSIS的卫星调制解调器。 卫星调制解调器从下游数据中提取PHY-MAP，并使用其中包含的信息对其具有足够的下行信号质量的队列进行解调和解码。 卫星调制解调器测量和传输下行信号质量到卫星网关，用于将流量分配给适当的队列。