-
公开(公告)号：US11705925B2
公开(公告)日：2023-07-18
申请号：US17899495
申请日：2022-08-30
Applicant: Micron Technology, Inc.
Inventor： Mustafa N. Kaynak , Sivagnanam Parthasarathy
CPC classification number: H03M13/3753 , G06F11/1076
Abstract: Methods, systems, and apparatuses include receiving a codeword stored in a memory device. The codeword is error corrected for a first number of iterations. The error correction includes traversing the codeword according to a first order. The codeword is error corrected for a second number of the iterations. The error correction of the codeword during a second iteration from the second number of iterations includes traversing the codeword according to a second order that is different from the first order.
-
公开(公告)号：US10003435B2
公开(公告)日：2018-06-19
申请号：US15361160
申请日：2016-11-25
Applicant: TELEFONICA, S.A.
Inventor： Javier Lorca Hernando
IPC: H04W4/00 , H04L1/00 , H04L5/00 , H04L29/06 , H03M13/29 , H03M13/37 , H03M13/00 , H04L1/20 , H03M13/11
CPC classification number: H04L1/0042 , H03M13/1128 , H03M13/2948 , H03M13/2957 , H03M13/3738 , H03M13/3753 , H03M13/612 , H04L1/005 , H04L1/201 , H04L5/0007 , H04L69/22
Abstract: A system, method and device for error detection/estimation in OFDM communications systems is proposed. The disclosed mechanism allows an efficient error prediction in a received packet, without having to perform full FEC decoding of the packet that could impair the overall latency of the system due to the time spent in a complete FEC decoding of the packet. In order to do that, it generates a decision variable with the aim to check whether a received packet has errors or not, after performing only partial FEC decoding of the packet, without either resorting to the use of error-detection codes.
-
公开(公告)号：US20180167086A1
公开(公告)日：2018-06-14
申请号：US15379450
申请日：2016-12-14
Applicant: VIA Technologies, Inc.
Inventor： Ying Yu Tai , Jiangli Zhu
CPC classification number: H03M13/3753 , G11C29/00 , G11C29/028 , G11C29/42 , G11C29/52 , H03M13/1111 , H03M13/1117 , H03M13/1142 , H03M13/175 , H03M13/658
Abstract: A low-density parity-check (LDPC) apparatus and a matrix trapping set breaking method are provided. The LDPC apparatus includes a logarithm likelihood ratio (LLR) mapping circuit, a variable node (VN) calculation circuit, an adjustment circuit, a check nodes (CN) calculation circuit and a controller. The LLR mapping circuit converts an original codeword into a LLR vector. The VN calculation circuit calculates original V2C information by using the LLR vector and C2V information. The adjustment circuit adjusts the original V2C information to get adjusted V2C information in accordance with a factor. The CN calculation circuit calculates the C2V information by using the adjusted V2C information, and provides the C2V information to the VN calculation circuit. The controller determines whether to adjust the factor. When LDPC iteration operation falls into matrix trap set, the controller decides to adjust the factor so that the iteration operation breaks away from the matrix trap set.
-
公开(公告)号：US20170257122A1
公开(公告)日：2017-09-07
申请号：US15259690
申请日：2016-09-08
Applicant: Kabushiki Kaisha Toshiba
Inventor： Osamu TORII , Haruka OBATA
CPC classification number: G06F11/1012 , H03M13/09 , H03M13/1515 , H03M13/152 , H03M13/2909 , H03M13/2927 , H03M13/3707 , H03M13/3738 , H03M13/3746 , H03M13/3753
Abstract: A memory controller according to an embodiment includes a first decoder which calculates first extrinsic value based on a decoding success rate specified using a first table showing a correspondence between first distance information indicating a square Euclidean distance between a first decode word and a first soft input value and a first decoding success rate indicating a probability of a decoding result that the first decode word is correct, and a second decoder which calculates second extrinsic value based on a decoding success rate specified using the second table showing a correspondence second distance information indicating a square Euclidean distance between a second decode word and a second soft input value and a second decoding success rate indicating a probability of a decoding result that the second decode word is correct.
-
公开(公告)号：US20170149529A1
公开(公告)日：2017-05-25
申请号：US15361160
申请日：2016-11-25
Applicant: TELEFONICA, S.A.
Inventor： Javier LORCA HERNANDO
CPC classification number: H04L1/0042 , H03M13/1128 , H03M13/2948 , H03M13/2957 , H03M13/3738 , H03M13/3753 , H03M13/612 , H04L1/005 , H04L1/201 , H04L5/0007 , H04L69/22
Abstract: A system, method and device for error detection/estimation in OFDM communications systems is proposed. The disclosed mechanism allows an efficient error prediction in a received packet, without having to perform full FEC decoding of the packet that could impair the overall latency of the system due to the time spent in a complete FEC decoding of the packet. In order to do that, it generates a decision variable with the aim to check whether a received packet has errors or not, after performing only partial FEC decoding of the packet, without either resorting to the use of error-detection codes.
-
公开(公告)号：US09489256B2
公开(公告)日：2016-11-08
申请号：US14101679
申请日：2013-12-10
Applicant: Seagate Technology LLC
Inventor： AbdelHakim S. Alhussien , Earl T. Cohen , Erich F. Haratsch
CPC classification number: G06F11/076 , G06F11/0727 , G06F11/079 , G06F11/1068 , G06F11/3037 , G06F11/3065 , G11B20/1833 , G11B2020/185 , H03M13/1108 , H03M13/1128 , H03M13/114 , H03M13/3753 , H03M13/612 , H03M13/6516
Abstract: An apparatus having a device and a circuit is disclosed. The device is configured to convey a codeword. The circuit is configured to (i) receive the codeword from the device, (ii) generate a syndrome by performing a portion less than all of an iterative decoding procedure on the codeword, (iii) generate a value by counting a number of unsatisfied parity checks in the syndrome and (iv) generate a quality metric of the device according to the value.
Abstract translation: 公开了一种具有装置和电路的装置。 该设备被配置为传送码字。 电路被配置为（i）从设备接收码字，（ii）通过对码字执行小于全部迭代解码过程的部分来生成校验子，（iii）通过计数不满足奇偶数的数量来生成值 检查综合征和（iv）根据该值产生设备的质量度量。
-
公开(公告)号：US09252816B1
公开(公告)日：2016-02-02
申请号：US14293721
申请日：2014-06-02
Applicant: DENSBITS TECHNOLOGIES LTD.
Inventor： Avi Steiner , Hanan Weingarten
CPC classification number: H03M13/2909 , H03M13/09 , H03M13/152 , H03M13/2918 , H03M13/2927 , H03M13/3707 , H03M13/3753 , H03M13/451 , H03M13/458
Abstract: A method of decoding an array of multi-dimensional code components, the method may include searching in a group of multi-dimensional code components a suspected multi-dimensional code component, wherein the suspected multi-dimensional code component belongs to the array multi-dimensional code components and is associated with a false correction probability that exceeds a false correction threshold; wherein the searching comprises dummy decoding, by a decoder, the group of multi-dimensional code components; and performing at least one non-dummy decoding of multi-dimensional code components of the array without performing non-dummy decoding of the suspected multi-dimensional code component.
Abstract translation: 一种对多维码分量阵列进行解码的方法，所述方法可以包括在一组多维码分量中搜索可疑的多维码分量，其中可疑的多维码分量属于阵列多维 并且与超过错误校正阈值的错误校正概率相关联; 其中所述搜索包括由解码器对所述一组多维码分量进行虚拟解码; 以及对所述阵列的多维码分量执行至少一个非虚拟解码，而不执行所述可疑多维码分量的非虚拟解码。
-
公开(公告)号：US09203442B2
公开(公告)日：2015-12-01
申请号：US14004846
申请日：2012-03-14
Applicant: Pallavi Reddy
Inventor： Pallavi Reddy
CPC classification number: H03M13/3753 , H03M13/2975 , H03M13/3905 , H03M13/3972
Abstract: A stopping criterion for a turbo-encoding method. The criterion is based on a state metrics calculated by a forward-backward recursion in a coding trellis of an elementary encoder. If, for at least one elementary decoding stage, forward state metrics of a last symbol of a block or backward state metrics of a first symbol of a block exceeds a first threshold, the turbo-decoding iterations are stopped. If it is not the case, it is further checked whether the state metrics exceeds a second threshold and if the absolute value of the difference between the current state metrics and the state metrics obtained at the previous iteration lies below a given margin. In the affirmative, the turbo-decoding iterations are stopped and a hard decision is taken on extrinsic values.
Abstract translation: turbo编码方法的停止标准。 该标准基于由基本编码器的编码格架中的前向后向递归计算的状态度量。 如果对于至少一个基本解码级，块的最后一个符号的前向状态度量或块的第一个符号的后向状态量度超过第一阈值，则停止turbo解码迭代。 如果不是这种情况，则进一步检查状态度量是否超过第二阈值，并且如果当前状态度量与在先前迭代中获得的状态度量之间的差的绝对值低于给定余量。 肯定的是，turbo解码迭代被停止，并且对外在值进行硬判决。
-
公开(公告)号：US20150333774A1
公开(公告)日：2015-11-19
申请号：US14811339
申请日：2015-07-28
Applicant: Micron Technology, Inc.
Inventor： Mustafa N. Kaynak , William H. Radke , Patrick R. Khayat , Sivagnanam Parthasarathy
CPC classification number: H03M13/3753 , G06F11/10 , G06F11/1012 , G06F11/1068 , G11C29/52 , H03M13/1108 , H03M13/1111 , H03M13/1128 , H03M13/114 , H03M13/116 , H03M13/1515 , H03M13/152 , H03M13/2906 , H03M13/3707
Abstract: The present disclosure includes apparatuses and methods related to stopping criteria for layered iterative error correction. A number of methods can include receiving a codeword with an error correction circuit, iteratively error correcting the codeword with the error correction circuit including parity checking the codeword on a layer-by-layer basis and updating the codeword after each layer. Methods can include stopping the iterative error correction in response to a parity check being correct for a particular layer.
Abstract translation: 本公开包括与停止用于分层迭代纠错的标准相关的装置和方法。 多种方法可以包括用纠错电路接收码字，用错误校正电路迭代地纠错码字，包括逐层地对码字进行奇偶校验，并在每层之后更新码字。 方法可以包括响应于针对特定层正确的奇偶校验来停止迭代纠错。
-
公开(公告)号：US20150149860A1
公开(公告)日：2015-05-28
申请号：US14601172
申请日：2015-01-20
Applicant: International Business Machines Corporation
Inventor： Roy D. Cideciyan , Robert A. Hutchins , Thomas Mittelholzer , Sedat Oelcer
CPC classification number: H03M13/3753 , G06F11/10 , G06F11/1076 , G11B20/10268 , G11B20/1833 , G11B2020/185 , H03M13/1102 , H03M13/1515 , H03M13/152 , H03M13/41 , H03M13/4138 , H03M13/6325 , H03M13/6331
Abstract: In one embodiment, a computer program product for iterative read channel operation has program instructions embodied therewith that are executable by a controller to cause the controller to: in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced: execute one or more digital front-end (DFE) functions on a plurality of signal samples employing the set of decisions provided by a decoder; execute a detection algorithm on the signal samples using a detector employing the set of decisions provided by the decoder to regenerate the set of decisions provided by a detector; execute a decoding algorithm of an error correcting code (ECC) using the set of decisions provided by the detector to regenerate the set of decisions provided by the decoder; and output decoding information relating to the signal samples when the decoding algorithm produces a valid codeword.
Abstract translation: 在一个实施例中，用于迭代读取信道操作的计算机程序产品具有其中实施的程序指令，其可由控制器执行以使得控制器在迭代过程中直到达到最大数量的迭代或产生有效代码字： 在采用由解码器提供的一组决定的多个信号样本上执行一个或多个数字前端（DFE）功能; 使用检测器执行对信号样本的检测算法，所述检测器采用由解码器提供的一组决定，以重新生成由检测器提供的一组判定; 使用由检测器提供的一组判决来执行纠错码（ECC）的解码算法，以重新生成由解码器提供的一组判决; 并且当解码算法产生有效码字时，输出与信号采样有关的解码信息。
