Electrical overstress protection circuit
    1.
    发明授权
    Electrical overstress protection circuit 有权
    电气过载保护电路

    公开(公告)号:US08363367B2

    公开(公告)日:2013-01-29

    申请号:US12632015

    申请日:2009-12-07

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0251 G06F17/5045

    摘要: A semiconductor circuit for electric overstress (EOS) protection is provided. The semiconductor circuit employs an electrostatic discharge (ESD) protection circuit, which has a resistor-capacitor (RC) time-delay network connected to a discharge capacitor. An electronic component that has voltage snapback property or a diodic behavior is connected to alter the logic state of the gate of the discharge transistor under an EOS event. Particularly, the electronic component is configured to turn on the gate of the discharge capacitor throughout the duration of an electrical overstress (EOS) condition as well as throughout the duration of an ESD event. A design structure may be employed to design or manufacture a semiconductor circuit that provides protection against an EOS condition without time limitation, i.e., without being limited by the time constant of the RC time delay network for EOS events that last longer than 1 microsecond.

    摘要翻译: 提供了一种用于电力过应力(EOS)保护的半导体电路。 半导体电路采用静电放电(ESD)保护电路,其具有连接到放电电容器的电阻 - 电容(RC)延时网络。 连接具有电压骤回特性或二极管行为的电子部件,以改变在EOS事件下放电晶体管的栅极的逻辑状态。 特别地,电子部件被配置成在电应力(EOS)条件以及ESD事件的整个持续时间期间打开放电电容器的栅极。 可以采用设计结构来设计或制造半导体电路,该半导体电路在没有时间限制的情况下提供针对EOS状态的保护,即不受时间长度超过1微秒的EOS事件的RC时间延迟网络的时间常数的限制。

    ESD field-effect transistor and integrated diffusion resistor
    7.
    发明授权
    ESD field-effect transistor and integrated diffusion resistor 有权
    ESD场效应晶体管和集成扩散电阻

    公开(公告)号:US08513738B2

    公开(公告)日:2013-08-20

    申请号:US13188094

    申请日:2011-07-21

    IPC分类号: H01L23/60

    摘要: An electrostatic discharge protection device, methods of fabricating an electrostatic discharge protection device, and design structures for an electrostatic discharge protection device. A drain of a first field-effect transistor and a diffusion resistor of higher electrical resistance may be formed as different portions of a doped region. The diffusion resistor, which is directly coupled with the drain of the first field-effect transistor, may be defined using an isolation region of dielectric material disposed in the doped region and selective silicide formation. The electrostatic discharge protection device may also include a second field-effect transistor having a drain as a portion the doped region that is directly coupled with the diffusion resistor and indirectly coupled by the diffusion resistor with the drain of the first field-effect transistor.

    摘要翻译: 静电放电保护装置,静电放电保护装置的制造方法以及静电放电保护装置的设计结构。 第一场效应晶体管的漏极和较高电阻的扩散电阻可以形成为掺杂区域的不同部分。 可以使用布置在掺杂区域中的介电材料的隔离区域和选择性硅化物形成来限定与第一场效应晶体管的漏极直接耦合的扩散电阻器。 静电放电保护器件还可以包括第二场效应晶体管,其具有作为与扩散电阻器直接耦合并且由扩散电阻器与第一场效应晶体管的漏极间接耦合的掺杂区域的一部分的漏极。

    ESD FIELD-EFFECT TRANSISTOR AND INTEGRATED DIFFUSION RESISTOR
    10.
    发明申请
    ESD FIELD-EFFECT TRANSISTOR AND INTEGRATED DIFFUSION RESISTOR 有权
    ESD场效应晶体管和集成扩散电阻

    公开(公告)号:US20130020645A1

    公开(公告)日:2013-01-24

    申请号:US13188094

    申请日:2011-07-21

    摘要: An electrostatic discharge protection device, methods of fabricating an electrostatic discharge protection device, and design structures for an electrostatic discharge protection device. A drain of a first field-effect transistor and a diffusion resistor of higher electrical resistance may be formed as different portions of a doped region. The diffusion resistor, which is directly coupled with the drain of the first field-effect transistor, may be defined using an isolation region of dielectric material disposed in the doped region and selective silicide formation. The electrostatic discharge protection device may also include a second field-effect transistor having a drain as a portion the doped region that is directly coupled with the diffusion resistor and indirectly coupled by the diffusion resistor with the drain of the first field-effect transistor.

    摘要翻译: 静电放电保护装置,静电放电保护装置的制造方法以及静电放电保护装置的设计结构。 第一场效应晶体管的漏极和较高电阻的扩散电阻可以形成为掺杂区域的不同部分。 可以使用布置在掺杂区域中的介电材料的隔离区域和选择性硅化物形成来限定与第一场效应晶体管的漏极直接耦合的扩散电阻器。 静电放电保护器件还可以包括第二场效应晶体管,其具有作为与扩散电阻器直接耦合并且由扩散电阻器与第一场效应晶体管的漏极间接耦合的掺杂区域的一部分的漏极。