公开(公告)号：US20160260816A1

公开(公告)日：2016-09-08

申请号：US15155967

申请日：2016-05-16

Applicant: Semi Solutions LLC

Inventor： Ashok K. Kapoor ,  Robert J. Strain

IPC: H01L29/66 ,  H01L21/265 ,  H01L21/324 ,  H01L21/266

CPC classification number: H01L29/6659 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/66636 ,  H01L29/7834

Abstract: A MOSFET structure and method of manufacture that minimize threshold variations associated with statistical uncertainties of implanted source and drain extensions. The source and drain extensions are fabricated very late in the process using a material added to etched recesses immediately adjacent to the transistor's channel. In various embodiments, the added material may be germanium grown by selective epitaxy, doped silicon grown by selective epitaxy, or metallic materials created by deposition or by deposition and reaction.

公开(公告)号：US20150236117A1

公开(公告)日：2015-08-20

申请号：US14616964

申请日：2015-02-09

Applicant: Semi Solutions LLC

Inventor： Ashok K. Kapoor ,  Robert J. Strain

IPC: H01L29/66 ,  H01L21/266 ,  H01L21/265 ,  H01L29/78

CPC classification number: H01L29/6659 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/66636 ,  H01L29/7834

Abstract: A MOSFET structure and method of manufacture that minimize threshold variations associated with statistical uncertainties of implanted source and drain extensions. The source and drain extensions are fabricated very late in the process using a material added to etched recesses immediately adjacent to the transistor's channel. In various embodiments, the added material may be germanium grown by selective epitaxy, doped silicon grown by selective epitaxy, or metallic materials created by deposition or by deposition and reaction.

Abstract translation: 一种MOSFET结构和制造方法，其最小化与植入的源极和漏极扩展的统计学不确定性相关联的阈值变化。 源极和漏极延伸部分在工艺过程中使用添加到紧邻晶体管通道的蚀刻凹槽的材料制造得非常晚。 在各种实施例中，添加的材料可以是通过选择性外延生长的锗，通过选择性外延生长的掺杂硅，或通过沉积或沉积和反应产生的金属材料。

公开(公告)号：US20150008490A1

公开(公告)日：2015-01-08

申请号：US14024415

申请日：2013-09-11

Applicant: SEMI SOLUTIONS LLC ,  GOLD STANDARD SIMULATIONS LTD.

Inventor： Robert J. Strain ,  Asen Asenov

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/3083 ,  H01L29/1041 ,  H01L29/1054 ,  H01L29/66818 ,  H01L29/785 ,  H01L29/7853

Abstract: This improved, fluctuation resistant FinFET, with a doped core and lightly doped epitaxial channel region between that core and the gate structure, is confined to the active-gate span because it is based on a channel structure having a limited extent. The improved structure is capable of reducing FinFET random doping fluctuations when doping is used to control threshold voltage, and the channel structure reduces fluctuations attributable to doping-related variations in effective channel length. Further, the transistor design affords better source and drain conductance when compared to prior art FinFETs. Two representative embodiments of the key structure are described in detail.

Abstract translation: 这种改进的具有波动性的FinFET在该核心和栅极结构之间具有掺杂的核心和轻掺杂的外延沟道区域，被限制在有源栅极跨距，因为它基于具有有限程度的沟道结构。 当掺杂用于控制阈值电压时，改进的结构能够减少FinFET随机掺杂波动，并且沟道结构减少归因于有效沟道长度的掺杂相关变化的波动。 此外，与现有技术的FinFET相比，晶体管设计提供更好的源极和漏极电导。 详细描述密钥结构的两个代表性实施例。

公开(公告)号：US09379214B2

公开(公告)日：2016-06-28

申请号：US14616964

申请日：2015-02-09

Applicant: Semi Solutions LLC

Inventor： Ashok K. Kapoor ,  Robert J. Strain

IPC: H01L29/00 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/165

CPC classification number: H01L29/6659 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/66636 ,  H01L29/7834

Abstract: A MOSFET structure and method of manufacture that minimize threshold variations associated with statistical uncertainties of implanted source and drain extensions. The source and drain extensions are fabricated very late in the process using a material added to etched recesses immediately adjacent to the transistor's channel. In various embodiments, the added material may be germanium grown by selective epitaxy, doped silicon grown by selective epitaxy, or metallic materials created by deposition or by deposition and reaction.

Abstract translation: 一种MOSFET结构和制造方法，其最小化与植入的源极和漏极扩展的统计学不确定性相关联的阈值变化。 源极和漏极延伸部分在工艺过程中使用添加到紧邻晶体管通道的蚀刻凹槽的材料制造得非常晚。 在各种实施例中，添加的材料可以是通过选择性外延生长的锗，通过选择性外延生长的掺杂硅，或通过沉积或沉积和反应产生的金属材料。

公开(公告)号：US20140103437A1

公开(公告)日：2014-04-17

申请号：US14051163

申请日：2013-10-10

Applicant: Gold Standard Simulations Ltd. ,  Semi Solutions LLC

Inventor： Ashok K. Kapoor ,  Robert J. Strain

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L29/66795 ,  H01L29/7853

Abstract: An improved fin field-effect transistor (FinFET) is built on a compound fin, which has a doped core and lightly doped epitaxial channel region between that core and the gate dielectric. The improved structure reduces FinFET random doping fluctuations when doping is used to control threshold voltage. Further, the transistor design affords better source and drain conductance when compared to prior art FinFETs. Three representative embodiments of the key structure are described in detail.

Abstract translation: 改进的鳍状场效应晶体管（FinFET）构建在复合鳍片上，复合鳍片在该芯体和栅极电介质之间具有掺杂的核心和轻掺杂的外延沟道区域。 当掺杂用于控制阈值电压时，改进的结构减少了FinFET随机掺杂波动。 此外，与现有技术的FinFET相比，晶体管设计提供更好的源极和漏极电导。 详细描述键结构的三个代表性实施例。

公开(公告)号：US09847404B2

公开(公告)日：2017-12-19

申请号：US14024415

申请日：2013-09-11

Applicant: Gold Standard Simulations Ltd. ,  Semi Solutions LLC

Inventor： Robert J. Strain ,  Asen Asenov

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/308

CPC classification number: H01L29/66795 ,  H01L21/3083 ,  H01L29/1041 ,  H01L29/1054 ,  H01L29/66818 ,  H01L29/785 ,  H01L29/7853

Abstract: This improved, fluctuation resistant FinFET, with a doped core and lightly doped epitaxial channel region between that core and the gate structure, is confined to the active-gate span because it is based on a channel structure having a limited extent. The improved structure is capable of reducing FinFET random doping fluctuations when doping is used to control threshold voltage, and the channel structure reduces fluctuations attributable to doping-related variations in effective channel length. Further, the transistor design affords better source and drain conductance when compared to prior art FinFETs. Two representative embodiments of the key structure are described in detail.