摘要:
A Josephson junction (JJ) quantum bit (qubits) arranged on a substrate is provided. In one embodiment, each qubit comprises a dielectric layer, a superconductor base layer portion underlying the dielectric layer and a first dielectric diffused region adjacent a dielectric layer/superconductor base layer portion junction. The qubit further comprise a superconductor mesa layer portion overlying the dielectric layer and having a second dielectric diffused region adjacent a dielectric layer/superconductor mesa layer portion junction, the first and second dielectric diffused regions mitigating further diffusion from other semiconductor processes on the plurality of qubits.
摘要:
One example includes a semiconductor device. The semiconductor device include a carbon nanotube substrate, a self-assembled monolayer, and a gate oxide. The self-assembled monolayer overlies the carbon nanotube substrate and is comprised of molecules each including a tail group, a carbon backbone, and a head group. The gate oxide overlies the self-assembled monolayer, wherein the self-assembled monolayer forms an interface between the carbon nanotube substrate and the gate oxide.
摘要:
A method is provided of forming a bipolar transistor device. The method comprises depositing a collector dielectric layer over a substrate in a collector active region, depositing a dielectric anti-reflective (DARC) layer over the collector dielectric layer, dry etching away a base opening in the DARC layer, and wet etching away a portion of the collector dielectric layer in the base opening to provide an extended base opening to the substrate. The method further comprises performing a base deposition to form a base epitaxy region in the extended base opening and extending over first and second portions of the DARC layer that remains as a result of the dry etching away the base opening in the DARC layer, and forming an emitter region over the base epitaxy region.
摘要:
Methods are provided of forming a Josephson junction (JJ) quantum bit (qubit). In one embodiment, the method comprises forming a JJ trilayer on a substrate. The JJ trilayer is comprised of a dielectric layer sandwiched between a bottom superconductor material layer and a top superconductor material layer. The method further comprises performing a thermal hardening process on the JJ trilayer to control diffusion of the dielectric layer into the bottom superconductor material layer and the top superconductor material layer, and etching openings in the JJ trilayer to form one or more JJ qubits.
摘要:
Methods of forming superconducting devices are disclosed. In one embodiment, the method can comprise depositing a protective barrier layer over a superconducting material layer, curing the protective barrier layer, depositing a photoresist material layer over the protective barrier layer and irradiating and developing the photoresist material layer to form an opening pattern in the photoresist material layer. The method can further comprise etching the protective barrier layer to form openings in the protective barrier layer based on the opening pattern, etching the superconductor material layer based on the openings in the protective barrier layer to form openings in the superconductor material layer that define a first set of superconductor material raised portins and stripping the photoresist material layer and the protective barrier layer.
摘要:
Methods are provided of forming a Josephson junction (JJ) quantum bit (qubit). In one embodiment, the method comprises forming a JJ trilayer on a substrate. The JJ trilayer is comprised of a dielectric layer sandwiched between a bottom superconductor material layer and a top superconductor material layer. The method further comprises performing a thermal hardening process on the JJ trilayer to control diffusion of the dielectric layer into the bottom superconductor material layer and the top superconductor material layer, and etching openings in the JJ trilayer to form one or more JJ qubits.
摘要:
A method is provided of forming a bipolar transistor device. The method comprises depositing a collector dielectric layer over a substrate in a collector active region, depositing a dielectric anti-reflective (DARC) layer over the collector dielectric layer, dry etching away a base opening in the DARC layer, and wet etching away a portion of the collector dielectric layer in the base opening to provide an extended base opening to the substrate. The method further comprises performing a base deposition to form a base epitaxy region in the extended base opening and extending over first and second portions of the DARC layer that remains as a result of the dry etching away the base opening in the DARC layer, and forming an emitter region over the base epitaxy region.
摘要:
One example includes a semiconductor device. The semiconductor device include a carbon nanotube substrate, a self-assembled monolayer, and a gate oxide. The self-assembled monolayer overlies the carbon nanotube substrate and is comprised of molecules each including a tail group, a carbon backbone, and a head group. The gate oxide overlies the self-assembled monolayer, wherein the self-assembled monolayer forms an interface between the carbon nanotube substrate and the gate oxide.
摘要:
A method is provided of forming a bipolar transistor device. The method comprises depositing a collector dielectric layer over a substrate in a collector active region, depositing a dielectric anti-reflective (DARC) layer over the collector dielectric layer, dry etching away a base opening in the DARC layer, and wet etching away a portion of the collector dielectric layer in the base opening to provide an extended base opening to the substrate. The method further comprises performing a base deposition to form a base epitaxy region in the extended base opening and extending over first and second portions of the DARC layer that remains as a result of the dry etching away the base opening in the DARC layer, and forming an emitter region over the base epitaxy region.
摘要:
One example includes a semiconductor device. The semiconductor device include a carbon nanotube substrate, a self-assembled monolayer, and a gate oxide. The self-assembled monolayer overlies the carbon nanotube substrate and is comprised of molecules each including a tail group, a carbon backbone, and a head group. The gate oxide overlies the self-assembled monolayer, wherein the self-assembled monolayer forms an interface between the carbon nanotube substrate and the gate oxide.