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    Sharing of functions between an embedded controller and a host processor
    5.
    发明授权
    Sharing of functions between an embedded controller and a host processor 有权
    共享嵌入式控制器和主机处理器之间的功能

    公开(公告)号：US07865646B1

    公开(公告)日：2011-01-04

    申请号：US11490008

    申请日：2006-07-20

    申请人： Ohad Falik ,  Yehezkel Friedman ,  Victor Flachs ,  Yuval Kirschner

    发明人： Ohad Falik ,  Yehezkel Friedman ,  Victor Flachs ,  Yuval Kirschner

    IPC分类号： G06F12/00

    CPC分类号： G06F13/387

    摘要： An improved system is described for allowing an embedded controller and a host processor to share access to modules in a computer system. The shared access system of the present invention enables exclusive, one-at-a-time access by a processor to a module and concurrent access by more than one processor to a module. An internal bus with two power sources is used to allow continued access by one of the processors when one of the two power sources is not providing power. Asynchronous clocking is provided to allow increased throughput to modules. An example of a protocol that allows an embedded controller to access more than one module is also described.

    摘要翻译： 描述了一种改进的系统，用于允许嵌入式控制器和主处理器共享对计算机系统中的模块的访问。 本发明的共享访问系统使得处理器能够对模块进行一次性一次访问，并且由多个处理器对模块的并发访问。 当两个电源之一不提供电源时，使用具有两个电源的内部总线来允许其中一个处理器继续访问。 提供异步时钟以允许增加模块的吞吐量。 还描述了允许嵌入式控制器访问多于一个模块的协议的示例。

    Memory interface including generation of timing signals for memory operation
    6.
    发明授权
    Memory interface including generation of timing signals for memory operation 有权
    存储器接口包括产生用于存储器操作的定时信号

    公开(公告)号：US07680966B1

    公开(公告)日：2010-03-16

    申请号：US10933697

    申请日：2004-09-03

    申请人： Ohad Falik ,  Paul Johnston

    发明人： Ohad Falik ,  Paul Johnston

    IPC分类号： G06F3/00

    CPC分类号： G11C5/02 ,  H01L24/05 ,  H01L25/0657 ,  H01L2224/48145 ,  H01L2224/49171 ,  H01L2225/06562 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/00012

    摘要： A memory device includes an interface controller for communication with a semiconductor device over a communication link. A clock signal is transmitted from the semiconductor device over the link to the memory device. A frequency of the clock signal may be any within a given range of frequencies. A frequency value signal conveying the value of the frequency of the clock signal is also transmitted. The interface controller includes circuitry for deriving from the clock signal and from the frequency value signal at least one timing signal for any operation in the memory device.

    摘要翻译： 存储器件包括用于通过通信链路与半导体器件通信的接口控制器。 时钟信号通过链路从半导体器件发送到存储器件。 时钟信号的频率可以在给定的频率范围内的任何频率。 传送时钟信号的频率值的频率值信号也被发送。 接口控制器包括用于从时钟信号和频率值信号导出用于存储器件中的任何操作的至少一个定时信号的电路。

    METHOD AND SYSTEM FOR REDUCING CACHE CONFLICTS
    7.
    发明申请
    METHOD AND SYSTEM FOR REDUCING CACHE CONFLICTS 有权
    减少缓存冲突的方法和系统

    公开(公告)号：US20090006765A1

    公开(公告)日：2009-01-01

    申请号：US11770107

    申请日：2007-06-28

    申请人： Ben-Zion Friedman ,  Ohad Falik

    发明人： Ben-Zion Friedman ,  Ohad Falik

    IPC分类号： G06F12/00

    CPC分类号： H04L49/9047 ,  H04L49/90 ,  H04L49/901

    摘要： Disclosed is a system and method for storing a plurality of data packets in a plurality of memory buffers in a cache memory for reducing cache conflicts. The method includes determining size of each of a plurality of data packets; storing a first data packet of the plurality of data packets starting from a first address in a first memory buffer of the plurality of memory buffers; determining an offset based on the size of the first data packet; and storing a second data packet in a second buffer starting from a second address based on the offset.

    摘要翻译： 公开了一种用于将多个数据分组存储在高速缓冲存储器中的多个存储器缓冲器中用于减少高速缓存冲突的系统和方法。 该方法包括确定多个数据分组中的每一个的大小; 从所述多个存储器缓冲器的第一存储器缓冲器中的第一地址开始存储所述多个数据分组的第一数据分组; 基于所述第一数据分组的大小确定偏移量; 以及基于所述偏移从第二地址开始将第二数据分组存储在第二缓冲器中。

    Secure universal serial bus
    8.
    发明授权
    Secure universal serial bus 有权
    安全通用串行总线

    公开(公告)号：US07320071B1

    公开(公告)日：2008-01-15

    申请号：US09862986

    申请日：2001-05-22

    申请人： Hezi Friedman ,  Gadi Erlich ,  Ohad Falik ,  Daivid Briet

    发明人： Hezi Friedman ,  Gadi Erlich ,  Ohad Falik ,  Daivid Briet

    IPC分类号： G06F9/00 ,  G06F11/30 ,  H04L9/00

    CPC分类号： G06F21/85

    摘要： An apparatus and method for providing a secure universal serial bus (USB) is disclosed. The secure USB comprises a secure channel for transferring data. A secure USB domain device is coupled to a host computer or is embedded within a host computer. The secure USB domain device comprises a USB memory device, a USB processor, a USB host controller, and an internal USB bus coupled to each of the elements of the secure USB domain device. The elements of the secure USB domain device are not accessible by the host computer. The secure USB domain device blocks the transmission of confidential information, enables the transmission of non-confidential information, and enables the transmission of encrypted confidential information.

    摘要翻译： 公开了一种用于提供安全通用串行总线（USB）的设备和方法。 安全USB包括用于传送数据的安全通道。 安全USB域设备耦合到主计算机或嵌入在主计算机中。 安全USB域设备包括耦合到安全USB域设备的每个元件的USB存储设备，USB处理器，USB主机控制器和内部USB总线。 主机不能访问安全USB域设备的元素。 安全USB域设备阻止机密信息的传输，实现非机密信息的传输，并且能够传输加密的机密信息。

    Flash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controller
    10.
    发明授权
    Flash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controller 有权
    用于具有嵌入式控制器的个人计算机中的安全共享BIOS实现的闪存保护方案

    公开(公告)号：US06976136B2

    公开(公告)日：2005-12-13

    申请号：US09850543

    申请日：2001-05-07

    申请人： Ohad Falik ,  Michal Schramm

    发明人： Ohad Falik ,  Michal Schramm

    IPC分类号： G06F9/445 ,  G06F12/14 ,  G06F13/16

    CPC分类号： G06F13/1605 ,  G06F8/654 ,  G06F12/1425

    摘要： An apparatus and method are disclosed for protecting the contents of a shared memory in a memory device controlled by an embedded controller. The apparatus allows dynamic setting of access permissions to said contents and allows updating and recovery of the contents. A computerized system comprising at least one Host linked to the memory device provides access paths to the shared memory, to the Host, and to the embedded controller. An arbitration device for allocating access paths to the memory device is also provided. The memory device is partitioned into separate blocks, each of which is used to store different types of data. A location is designated in the shared memory for storing protection information that includes data related to access operations allowed by at least one access path to a part of the shared memory. Access, via the arbitration device, to separate parts of the shared memory is permitted by using an access control unit that enables/disables access to predetermined portions of the shared memory by at least one of the access paths.

    摘要翻译： 公开了一种用于保护由嵌入式控制器控制的存储器件中的共享存储器的内容的装置和方法。 该装置允许对所述内容的访问权限的动态设置，并且允许更新和恢复内容。 包括至少一个与存储器件连接的主机的计算机化系统提供到共享存储器，主机和嵌入式控制器的访问路径。 还提供了一种用于向存储设备分配访问路径的仲裁设备。 存储器件被分割成单独的块，每个块用于存储不同类型的数据。 在共享存储器中指定一个位置，用于存储保护信息，该保护信息包括与由共享存储器的一部分的至少一个访问路径允许的访问操作有关的数据。 通过使用访问控制单元允许通过仲裁设备访问共享存储器的分离部分，该访问控制单元通过至少一个访问路径来启用/禁用对共享存储器的预定部分的访问。