公开(公告)号：US20140095944A1

公开(公告)日：2014-04-03

申请号：US13631934

申请日：2012-09-29

Applicant: James W. Alexander ,  Buck W. Gremel ,  Pinkesh J. Shah ,  Malay Trivedi ,  Mohan K. Nair

Inventor： James W. Alexander ,  Buck W. Gremel ,  Pinkesh J. Shah ,  Malay Trivedi ,  Mohan K. Nair

IPC: G06F1/26 ,  G06F11/07

CPC classification number: G06F1/3253 ,  Y02D10/151

Abstract: An apparatus and method are disclosed to optimize the latency and the power of a link operating inside a processor-based system. The apparatus and method include a latency meter built into a queue that does not rely on a queue-depth threshold. The apparatus and method also include feedback logic that optimizes power reduction around an increasing latency target to react to sluggish re-provisioning behavior imposed by the physical properties of the link.

Abstract translation: 公开了一种用于优化在基于处理器的系统内操作的链路的等待时间和功率的装置和方法。 该装置和方法包括内置于不依赖于队列深度阈值的队列中的等待时间计。 该装置和方法还包括反馈逻辑，其优化围绕增加的延迟目标的功率降低以对由链路的物理属性施加的缓慢的重新供应行为作出反应。

公开(公告)号：US08618788B2

公开(公告)日：2013-12-31

申请号：US11731161

申请日：2007-03-30

Applicant: Malay Trivedi ,  Erik A. McShane ,  James T. Doyle

Inventor： Malay Trivedi ,  Erik A. McShane ,  James T. Doyle

IPC: G05F1/00

CPC classification number: H02M3/1584

Abstract: In some embodiments, a multi-phase converter with dynamic phase adjustment is provided. In some embodiments, a controller may include circuitry to control how many phase legs are active based on output current and also which phase legs are to be enabled.

Abstract translation: 在一些实施例中，提供了具有动态相位调整的多相转换器。 在一些实施例中，控制器可以包括用于基于输出电流以及哪些相位腿被启用来控制多少相位线是有效的电路。

公开(公告)号：US08441149B2

公开(公告)日：2013-05-14

申请号：US12824134

申请日：2010-06-25

Applicant: Malay Trivedi ,  Tong H. Kim

Inventor： Malay Trivedi ,  Tong H. Kim

IPC: H02J1/00 ,  H01H9/54

CPC classification number: G05F3/16 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  H02J1/00 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172 ,  Y10T307/406 ,  Y10T307/944

Abstract: A high-speed low dropout (HS-LDO) voltage regulation circuit suitable to enable a power gate unit to produce a variable voltage signal based on the load of a processor is disclosed herein. In various embodiments, selection logic may dynamically enable or disable the HS-LDO circuit to allow the power gate unit to operate under a fully-on or fully-off mode. Other embodiments may be disclosed or claimed.

Abstract translation: 这里公开了适合于使功率门单元基于处理器的负载产生可变电压信号的高速低压差（HS-LDO）电压调节电路。 在各种实施例中，选择逻辑可以动态地使能或禁用HS-LDO电路以允许功率门单元在完全启动或完全关闭模式下工作。 可以公开或要求保护其他实施例。

公开(公告)号：US07952160B2

公开(公告)日：2011-05-31

申请号：US11968115

申请日：2007-12-31

Applicant: Nicholas D. Triantafillou ,  Malay Trivedi ,  Erik A. McShane ,  James T. Doyle ,  Mark J. Kachmarek

Inventor： Nicholas D. Triantafillou ,  Malay Trivedi ,  Erik A. McShane ,  James T. Doyle ,  Mark J. Kachmarek

IPC: H01L21/70

CPC classification number: H01L23/645 ,  H01F2017/0086 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2924/0002 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Inductors packaged with a voltage regulator for an integrated circuit within the same package are deposited to a sufficient thickness to reduce resistance and improve the quality factor. Furthermore, the voltage regulator switches currents through the inductors at a relatively high frequency such that the overall size and inductances of the inductors may be reduced. As a consequence, integrating both the integrated circuits including a voltage regulator and associated inductor array in a single package is facilitated. Other embodiments are described and claimed.

Abstract translation: 与同一封装内的集成电路的电压调节器封装的电感器被沉积到足够的厚度以降低电阻并提高品质因数。 此外，电压调节器以相对高的频率切换电流通过电感器，使得可以减小电感器的总体尺寸和电感。 因此，将包括电压调节器和相关联的电感器阵列的集成电路集成在单个封装中是便利的。 描述和要求保护其他实施例。

公开(公告)号：US5914513A

公开(公告)日：1999-06-22

申请号：US81389

申请日：1998-05-18

Applicant: Krishna Shenai ,  Malay Trivedi

Inventor： Krishna Shenai ,  Malay Trivedi

IPC: H01L21/02 ,  H01L27/06 ,  H01L27/07 ,  H01L27/08 ,  H01L29/93 ,  H01L29/94

CPC classification number: H01L28/40 ,  H01L27/0688 ,  H01L27/0733 ,  H01L27/0805 ,  H01L29/93 ,  H01L29/94

Abstract: A tunable capacitor includes a first capacitor formed from semiconductor material and having a first terminal defining an anode, and a second capacitor integrally formed with the first capacitor from semiconductor material, the second capacitor being operatively coupled in series with the first capacitor, and having a second terminal defining a cathode. The second capacitor is formed as a field effect device or MOSFET configured to provide a depletion region controlled by applying a control voltage to a control terminal of the field effect device. The first capacitor is reverse biased by application of a reverse bias voltage between the anode and the cathode to provide a predetermined capacitance while the control voltage applied to the control terminal of the second capacitor varies the depletion region such that the capacitance of second capacitor is varied independently of the reverse bias voltage.

Abstract translation: 可调谐电容器包括由半导体材料形成并具有限定阳极的第一端子的第一电容器和从半导体材料与第一电​​容器整体形成的第二电容器，第二电容器与第一电容器串联操作耦合，并且具有 第二端子限定阴极。 第二电容器形成为场效应器件或MOSFET，其被配置为提供通过对场效应器件的控制端施加控制电压而被控制的耗尽区。 通过在阳极和阴极之间施加反向偏置电压来反向偏置第一电容器以提供预定的电容，同时施加到第二电容器的控制端的控制电压改变耗尽区，使得第二电容器的电容变化 独立于反向偏置电压。

公开(公告)号：US09292465B2

公开(公告)日：2016-03-22

申请号：US13993106

申请日：2011-12-21

Applicant: Malay Trivedi ,  Mohan K. Nair ,  Joseph Murray ,  Devadatta V. Bodas ,  James W. Alexander ,  Vijayendra K. Hoskoti

Inventor： Malay Trivedi ,  Mohan K. Nair ,  Joseph Murray ,  Devadatta V. Bodas ,  James W. Alexander ,  Vijayendra K. Hoskoti

IPC: G06F13/42 ,  G06F13/38

CPC classification number: G06F13/42 ,  G06F13/387 ,  G06F2213/0026 ,  Y02D10/14 ,  Y02D10/151

Abstract: Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.

Abstract translation: 实施例帮助动态配置PCIe链路的宽度，并确定如何最佳地配置适当的链路宽度。 这有助于避免PCIe链路几乎总是处于活动状态，即使在非常低的流量速率。 实施例基于例如位于PCIe控制器下游的集成和非集成端口的带宽需求的运行时监视来实现这些益处。 这提供了功率节省，对性能影响不大。 本文讨论了其它实施例。

公开(公告)号：US20140019654A1

公开(公告)日：2014-01-16

申请号：US13993106

申请日：2011-12-21

Applicant: Malay Trivedi ,  Mohan K. Nair ,  Joseph Murray ,  Devadatta V. Bodas ,  James W. Alexander ,  Vijayendra K. Hoskoti

Inventor： Malay Trivedi ,  Mohan K. Nair ,  Joseph Murray ,  Devadatta V. Bodas ,  James W. Alexander ,  Vijayendra K. Hoskoti

IPC: G06F13/42

CPC classification number: G06F13/42 ,  G06F13/387 ,  G06F2213/0026 ,  Y02D10/14 ,  Y02D10/151

Abstract: Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.

Abstract translation: 实施例帮助动态配置PCIe链路的宽度，并确定如何最佳地配置适当的链路宽度。 这有助于避免PCIe链路几乎总是处于活动状态，即使在非常低的流量速率。 实施例基于例如位于PCIe控制器下游的集成和非集成端口的带宽需求的运行时监视来实现这些益处。 这提供了功率节省，对性能影响不大。 本文讨论了其它实施例。

公开(公告)号：US20100164622A1

公开(公告)日：2010-07-01

申请号：US12347081

申请日：2008-12-31

Applicant: Fuding Ge ,  Brent D. Thomas ,  Malay Trivedi ,  James T. Doyle

Inventor： Fuding Ge ,  Brent D. Thomas ,  Malay Trivedi ,  James T. Doyle

IPC: H03F3/45

CPC classification number: H03F3/005 ,  H03F3/45475

Abstract: Methods and systems to amplify and convert a single-ended analog signal to a differential signal and to convert the differential signal to a digital value, including to time-multiplex a plurality of windowed single-ended analog error signals, amplify a difference between the time-multiplexed analog signals, sample a corresponding amplified difference signal and an inverted amplified difference signal, amplify and center the samples about a common mode, and convert a corresponding amplified differential signal to digital values in a pipeline fashion. Bias adjustable features may be implemented to control a bandwidth, and clock rates may be adjustable to correspond to the bandwidth.

Abstract translation: 将单端模拟信号放大并转换为差分信号并将差分信号转换为数字值的方法和系统，包括对多个窗口化的单端模拟误差信号进行时间复用，放大时间差 多路复用模拟信号，对相应的放大差分信号和反相放大差分信号进行采样，对共模进行放大和中心采样，并以相应的方式将相应的放大差分信号转换为数字值。 可以实施偏置可调特征以控制带宽，并且时钟速率可以是可调节的以对应于带宽。

公开(公告)号：US07023672B2

公开(公告)日：2006-04-04

申请号：US10358066

申请日：2003-02-03

Applicant: John Ryan Goodfellow ,  Robert T. Carroll ,  Malay Trivedi ,  Erik McShane ,  Kevin Mori

Inventor： John Ryan Goodfellow ,  Robert T. Carroll ,  Malay Trivedi ,  Erik McShane ,  Kevin Mori

IPC: H02H3/22

CPC classification number: H02M3/1584 ,  H02M3/157 ,  H02M3/1588 ,  Y02B70/1466

Abstract: Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON. Fault detection circuitry identifies over voltage, under voltage, and excessive temperatures. All communications between the control IC and the power IC are digital providing high bandwidth, optimal control frequency response, noise immunity and efficient active transient response.

Abstract translation: 公开了一种数字控制的多相电压调节器系统，为具有可变功率要求的电子元件提供稳压电源。 电源由一个或多个功率集成电路（IC）提供，每个功率集成电路均具有由脉冲宽度调制信号控制的高侧功率开关和低侧功率开关。 功率IC感测负载上的电压，并且具有用于产生作为传送到负载的电流的比率的电流的片上电流镜。 电源IC还具有电流限制和片上温度感测元件。 电压和电流信息被数字化并提供给控制集成电路（IC）。 控制IC接收该数字化信息以及用户提供的参数，并且在调节操作模式下，向功率IC提供数字化的脉宽调制控制信号。 在有效的瞬态响应操作模式中，控制IC提供信号以使高侧开关或低侧开关接通。 故障检测电路识别过电压，欠电压和过高的温度。 控制IC和电源IC之间的所有通信都是提供高带宽，最佳控制频率响应，抗噪声和有效的主动瞬态响应的数字。

公开(公告)号：US06965502B2

公开(公告)日：2005-11-15

申请号：US10103980

申请日：2002-03-22

Applicant: Thomas P. Duffy ,  Ryan Goodfellow ,  Malay Trivedi ,  Kevin Mori ,  Benjamim Tang

Inventor： Thomas P. Duffy ,  Ryan Goodfellow ,  Malay Trivedi ,  Kevin Mori ,  Benjamim Tang

IPC: G06F1/30 ,  H02H9/00

CPC classification number: G06F1/305

Abstract: The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply.The system provides rapid recovery to steady state operation from the active transient response mode by using a digital compensator to quickly modifying the duty cycle and provide a voltage offset proportional to the transient microprocessor load step. Recovery is further improved by current rephasing techniques.

Abstract translation: 本发明提供了一种具有高速信号稳定能力的功率调节系统和方法，用于向微电子器件提供快速的主动瞬态响应。 有源瞬态响应系统包括被配置为接收指示瞬态负载状况的发生的外部和/或内部信号的电源，并且基于这些信号中的一个或多个来响应瞬态负载条件。 该系统还可以包括被配置为用于早期检测瞬态，辅助瞬态抑制以及对电源的瞬时活动的早期信号的瞬态抑制器。 该系统通过使用数字补偿器快速修改占空比并提供与瞬态微处理器负载阶跃成比例的电压偏移，从主动瞬态响应模式快速恢复到稳态运行。 通过目前的重塑技术进一步改善了恢复。