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公开(公告)号：US20140095944A1
公开(公告)日：2014-04-03
申请号：US13631934
申请日：2012-09-29
Applicant: James W. Alexander , Buck W. Gremel , Pinkesh J. Shah , Malay Trivedi , Mohan K. Nair
Inventor： James W. Alexander , Buck W. Gremel , Pinkesh J. Shah , Malay Trivedi , Mohan K. Nair
CPC classification number: G06F1/3253 , Y02D10/151
Abstract: An apparatus and method are disclosed to optimize the latency and the power of a link operating inside a processor-based system. The apparatus and method include a latency meter built into a queue that does not rely on a queue-depth threshold. The apparatus and method also include feedback logic that optimizes power reduction around an increasing latency target to react to sluggish re-provisioning behavior imposed by the physical properties of the link.
Abstract translation: 公开了一种用于优化在基于处理器的系统内操作的链路的等待时间和功率的装置和方法。 该装置和方法包括内置于不依赖于队列深度阈值的队列中的等待时间计。 该装置和方法还包括反馈逻辑，其优化围绕增加的延迟目标的功率降低以对由链路的物理属性施加的缓慢的重新供应行为作出反应。
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2.发明申请METHOD AND APPARATUS TO SELECTIVELY EXTEND AN EMBEDDED MICROPROCESSOR BUS THROUGH A DIFFERENT EXTERNAL BUS 审中-公开通过不同的外部总线选择性地扩展嵌入式微处理器总线的方法和装置公开(公告)号：US20100306437A1
公开(公告)日：2010-12-02
申请号：US12471616
申请日：2009-05-26
Applicant: Matthew W. Heath , Mohan K. Nair , Guadalupe J. Garcia , Bibbin Chacko , Timothy F. Waite , Mark A. Yarch , Hang T. Nguyen , Saiyid Al-Mahmood , Lyonel Renaud , Ganesh Kondapuram , Richard L. Stout
Inventor： Matthew W. Heath , Mohan K. Nair , Guadalupe J. Garcia , Bibbin Chacko , Timothy F. Waite , Mark A. Yarch , Hang T. Nguyen , Saiyid Al-Mahmood , Lyonel Renaud , Ganesh Kondapuram , Richard L. Stout
IPC: G06F13/14
CPC classification number: G06F13/4027 , G06F2213/0026
Abstract: A method and apparatus to selectively extend an embedded microprocessor bus through a different external bus are generally presented. In this regard, an apparatus is introduced comprising a first high speed serializer/deserializer (SERDES) bus internal to an integrated circuit device to couple an embedded microprocessor with an embedded component, a second high speed SERDES bus different from the first bus to couple the embedded component with an external interface of the integrated circuit device, and extension circuitry to selectively bypass the embedded component and extend the first bus to function at the external interface over a physical layer of the second bus. Other embodiments are also described and claimed.
Abstract translation: 通常呈现通过不同的外部总线选择性地扩展嵌入式微处理器总线的方法和装置。 在这方面，引入一种装置，其包括集成电路装置内部的第一高速串行器/解串器（SERDES）总线，以将嵌入式微处理器与嵌入式组件耦合，第二高速SERDES总线与第一总线不同以耦合 嵌入式组件与集成电路设备的外部接口，以及扩展电路，用于选择性地旁路嵌入式组件，并且扩展第一总线以在第二总线的物理层上在外部接口处工作。 还描述和要求保护其他实施例。
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公开(公告)号：US09292465B2
公开(公告)日：2016-03-22
申请号：US13993106
申请日：2011-12-21
Applicant: Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
Inventor： Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
CPC classification number: G06F13/42 , G06F13/387 , G06F2213/0026 , Y02D10/14 , Y02D10/151
Abstract: Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.
Abstract translation: 实施例帮助动态配置PCIe链路的宽度，并确定如何最佳地配置适当的链路宽度。 这有助于避免PCIe链路几乎总是处于活动状态，即使在非常低的流量速率。 实施例基于例如位于PCIe控制器下游的集成和非集成端口的带宽需求的运行时监视来实现这些益处。 这提供了功率节省，对性能影响不大。 本文讨论了其它实施例。
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公开(公告)号：US20140019654A1
公开(公告)日：2014-01-16
申请号：US13993106
申请日：2011-12-21
Applicant: Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
Inventor： Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
IPC: G06F13/42
CPC classification number: G06F13/42 , G06F13/387 , G06F2213/0026 , Y02D10/14 , Y02D10/151
Abstract: Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.
Abstract translation: 实施例帮助动态配置PCIe链路的宽度，并确定如何最佳地配置适当的链路宽度。 这有助于避免PCIe链路几乎总是处于活动状态，即使在非常低的流量速率。 实施例基于例如位于PCIe控制器下游的集成和非集成端口的带宽需求的运行时监视来实现这些益处。 这提供了功率节省，对性能影响不大。 本文讨论了其它实施例。
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公开(公告)号：US08270405B2
公开(公告)日：2012-09-18
申请号：US12495487
申请日：2009-06-30
Applicant: Chih-Cheh Chen , Michael T. Klinglesmith , David M. Lee , John Zulauf , Itay Franko , Peter J. Elardo , Mohan K. Nair , Christopher Van Beek
Inventor： Chih-Cheh Chen , Michael T. Klinglesmith , David M. Lee , John Zulauf , Itay Franko , Peter J. Elardo , Mohan K. Nair , Christopher Van Beek
IPC: H04L12/28
Abstract: Devices and method with hardware configured to support phantom register programming. Where phantom register programming allows a device driver for an endpoint device to program multicast registers in the device without support of the operating system.
Abstract translation: 硬件配置支持幻像寄存器编程的设备和方法。 幻影寄存器编程允许端点设备的设备驱动程序在设备中对组播寄存器进行编程，而无需支持操作系统。
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Patent Agency Ranking
公开(公告)号：US08908688B2
公开(公告)日：2014-12-09
申请号：US13610363
申请日：2012-09-11
Applicant: Chih-Cheh Chen , Michael T. Klinglesmith , David M. Lee , John Zulauf , Itay Franko , Peter J. Elardo , Mohan K. Nair , Chris Van Beek
Inventor： Chih-Cheh Chen , Michael T. Klinglesmith , David M. Lee , John Zulauf , Itay Franko , Peter J. Elardo , Mohan K. Nair , Chris Van Beek
IPC: H04L12/28 , H04J3/26 , H04L12/18 , H04L12/931
Abstract: Devices and method with hardware configured to support phantom register programming. Where phantom register programming allows a device driver for an endpoint device to program multicast registers in the device without support of the operating system.
Abstract translation: 硬件配置支持幻像寄存器编程的设备和方法。 幻影寄存器编程允许端点设备的设备驱动程序在设备中对组播寄存器进行编程，而无需支持操作系统。
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公开(公告)号：US20140258492A1
公开(公告)日：2014-09-11
申请号：US14209207
申请日：2014-03-13
Applicant: Sridhar Lakshmanamurthy , Mikal C. Hunsaker , Michael T. Klinglesmith , Blaise Fanning , Mohan K. Nair , Joseph Murray , Rohit R. Verma , Gary J. Lavelle , Robert P. Adler
Inventor： Sridhar Lakshmanamurthy , Mikal C. Hunsaker , Michael T. Klinglesmith , Blaise Fanning , Mohan K. Nair , Joseph Murray , Rohit R. Verma , Gary J. Lavelle , Robert P. Adler
IPC: H04L12/761
CPC classification number: G06F13/364 , G06F13/385 , G06F13/4265 , G06F15/7807 , G06F15/7825 , G06F2213/0038 , H04L12/28 , H04L12/54 , H04L45/00 , H04L45/16
Abstract: In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，本发明包括一种用于从耦合到路由器的第一端点在路由器中接收请求的方法，其中该请求用于聚合完成。 反过来，路由器可以将请求转发到多个目标代理，从每个目标代理接收响应，并将响应合并到聚合完成中。 然后，路由器可以将聚合完成发送到第一个端点。 描述和要求保护其他实施例。
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公开(公告)号：US08711875B2
公开(公告)日：2014-04-29
申请号：US13248243
申请日：2011-09-29
Applicant: Sridhar Lakshmanamurthy , Mikal C. Hunsaker , Michael T. Klinglesmith , Blaise Fanning , Mohan K. Nair , Joseph Murray , Rohit R. Verma , Gary J. Lavelle , Robert P. Adler
Inventor： Sridhar Lakshmanamurthy , Mikal C. Hunsaker , Michael T. Klinglesmith , Blaise Fanning , Mohan K. Nair , Joseph Murray , Rohit R. Verma , Gary J. Lavelle , Robert P. Adler
CPC classification number: G06F13/364 , G06F13/385 , G06F13/4265 , G06F15/7807 , G06F15/7825 , G06F2213/0038 , H04L12/28 , H04L12/54 , H04L45/00 , H04L45/16
Abstract: In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，本发明包括一种用于从耦合到路由器的第一端点在路由器中接收请求的方法，其中该请求用于聚合完成。 反过来，路由器可以将请求转发到多个目标代理，从每个目标代理接收响应，并将响应合并到聚合完成中。 然后，路由器可以将聚合完成发送到第一个端点。 描述和要求保护其他实施例。
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公开(公告)号：US20130083794A1
公开(公告)日：2013-04-04
申请号：US13248243
申请日：2011-09-29
Applicant: Sridhar Lakshmanamurthy , Mikal C. Hunsaker , Michael T. Klinglesmith , Blaise Fanning , Mohan K. Nair , Joseph Murray , Rohit R. Verma , Gary J. Lavelle , Robert P. Adler
Inventor： Sridhar Lakshmanamurthy , Mikal C. Hunsaker , Michael T. Klinglesmith , Blaise Fanning , Mohan K. Nair , Joseph Murray , Rohit R. Verma , Gary J. Lavelle , Robert P. Adler
CPC classification number: G06F13/364 , G06F13/385 , G06F13/4265 , G06F15/7807 , G06F15/7825 , G06F2213/0038 , H04L12/28 , H04L12/54 , H04L45/00 , H04L45/16
Abstract: In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，本发明包括一种用于从耦合到路由器的第一端点在路由器中接收请求的方法，其中该请求用于聚合完成。 反过来，路由器可以将请求转发到多个目标代理，从每个目标代理接收响应，并将响应合并到聚合完成中。 然后，路由器可以将聚合完成发送到第一个端点。 描述和要求保护其他实施例。
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公开(公告)号：US20130016720A1
公开(公告)日：2013-01-17
申请号：US13610363
申请日：2012-09-11
Applicant: Chih-Cheh Chen , Michael T. Klinglesmith , David M. Lee , John Zulauf , Itay Franko , Peter J. Elardo , Mohan K. Nair , Christopher Van Beek
Inventor： Chih-Cheh Chen , Michael T. Klinglesmith , David M. Lee , John Zulauf , Itay Franko , Peter J. Elardo , Mohan K. Nair , Christopher Van Beek
IPC: H04L12/56
Abstract: Devices and method with hardware configured to support phantom register programming. Where phantom register programming allows a device driver for an endpoint device to program multicast registers in the device without support of the operating system.
Abstract translation: 硬件配置支持幻像寄存器编程的设备和方法。 幻影寄存器编程允许端点设备的设备驱动程序在设备中对组播寄存器进行编程，而无需支持操作系统。
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