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公开(公告)号：US20080254605A1
公开(公告)日：2008-10-16
申请号：US11735926
申请日：2007-04-16
IPC分类号： H01L21/3205
CPC分类号： H01L21/28185 , H01L21/28194 , H01L29/517
摘要： One inventive aspect is related to a method of minimizing the final thickness of an interfacial oxide layer between a semiconductor material and a high dielectric constant material. The method comprises depositing a covering layer on the high dielectric constant material. The method further comprises removing adsorbed/absorbed water from the high dielectric constant material prior to depositing the covering layer. The removal of adsorbed/absorbed water is preferably done by a degas treatment. The covering layer may be a gate electrode or a spacer dielectric.
摘要翻译： 一个发明方面涉及使半导体材料和高介电常数材料之间的界面氧化物层的最终厚度最小化的方法。 该方法包括在高介电常数材料上沉积覆盖层。 该方法还包括在沉积覆盖层之前从高介电常数材料中除去吸附/吸收的水。 吸附/吸收的水的去除优选通过脱气处理进行。 覆盖层可以是栅电极或间隔电介质。
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2.发明授权Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier 有权具有高介电常数栅极电介质和集成扩散势垒的互补金属氧化物半导体（CMOS）栅极叠层公开(公告)号：US07169674B2
公开(公告)日：2007-01-30
申请号：US11066762
申请日：2005-02-28
申请人： Nestor Alexander Bojarczuk, Jr. , Kevin Kok Chan , Christopher Peter D'Emic , Evgeni Gousev , Supratik Guha , Paul C. Jamison , Lars-Ake Ragnarsson
发明人： Nestor Alexander Bojarczuk, Jr. , Kevin Kok Chan , Christopher Peter D'Emic , Evgeni Gousev , Supratik Guha , Paul C. Jamison , Lars-Ake Ragnarsson
IPC分类号： H01L21/8236 , H01L21/8222 , H01L21/335 , H01L21/8234 , H01L21/336 , H01L21/331
CPC分类号： H01L29/513 , H01L21/28194
摘要： A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over the channel region. The insulating material includes nitrogen (N), and is disposed under the gate electrode. The insulating material can be provided either as a layer or distributed within a gate dielectric material disposed under the gate electrode.
摘要翻译： 用于具有沟道区和栅电极的场效应晶体管的扩散势垒（和形成扩散势垒的方法）包括设置在沟道区上的绝缘材料。 绝缘材料包括氮（N），并且设置在栅电极下方。 绝缘材料可以设置为层或分布在设置在栅电极下方的栅极电介质材料内。
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3.发明申请Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same 失效氮化铝和氧化铝/氮化铝异质结构栅极电介质堆叠的场效应晶体管及其形成方法公开(公告)号：US20050087821A1
公开(公告)日：2005-04-28
申请号：US10976068
申请日：2004-10-29
IPC分类号： H01L29/78 , H01L21/28 , H01L21/316 , H01L21/318 , H01L29/51 , H01L29/772
CPC分类号： H01L21/28202 , H01L21/28194 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A structure (e.g., field effect transistor) and a method for making the structure, include a substrate having a source region, a drain region, and a channel region therebetween, an insulating layer disposed over the channel region, the insulating layer including a layer including aluminum nitride disposed over the channel region, and a gate electrode disposed over the insulating layer.
摘要翻译： 一种结构（例如场效应晶体管）和一种制造该结构的方法包括：具有源极区，漏极区和沟道区的衬底，设置在沟道区上方的绝缘层，绝缘层包括层 包括设置在沟道区域上的氮化铝，以及设置在绝缘层上的栅电极。
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4.发明申请METHOD FOR MANUFACTURING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE MADE THEREOF 审中-公开制造双功能半导体器件的半导体器件及其半导体器件的制造方法公开(公告)号：US20100219481A1
公开(公告)日：2010-09-02
申请号：US12684803
申请日：2010-01-08
申请人： Joshua Tseng , Yasutoshi Okuno , Lars-Ake Ragnarsson , Tom Schram , Stefan Kubicek , Thomas Y. Hoffmann , Naohisa Sengoku
发明人： Joshua Tseng , Yasutoshi Okuno , Lars-Ake Ragnarsson , Tom Schram , Stefan Kubicek , Thomas Y. Hoffmann , Naohisa Sengoku
IPC分类号： H01L27/092 , H01L21/28
摘要： A method for manufacturing a dual work function device is disclosed. In one aspect, the process includes a first and second region in a substrate. The method includes forming a first transistor in the first region which has a first work function. Subsequently, a second transistor is formed in the second region having a different work function. The process of forming the first transistor includes providing a first gate dielectric stack having a first gate dielectric layer and a first gate dielectric capping layer on the first gate dielectric layer, performing a thermal treatment to modify the first gate dielectric stack, the modified first gate dielectric stack defining the first work function, providing a first metal gate electrode layer on the modified first gate dielectric stack, and patterning the first metal gate electrode layer and the modified first gate dielectric stack.
摘要翻译： 公开了一种用于制造双功能功能装置的方法。 在一个方面，该方法包括在基底中的第一和第二区域。 该方法包括在具有第一功能的第一区域中形成第一晶体管。 随后，在具有不同功函数的第二区域中形成第二晶体管。 形成第一晶体管的过程包括提供在第一栅极介电层上具有第一栅极介电层和第一栅极介电覆盖层的第一栅极电介质堆叠，执行热处理以修改第一栅极电介质堆叠，修改的第一栅极 限定第一功函数的电介质叠层，在修改的第一栅极电介质堆叠上提供第一金属栅极电极层，以及对第一金属栅极电极层和修改的第一栅极电介质堆叠进行构图。
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公开(公告)号：US20090090971A1
公开(公告)日：2009-04-09
申请号：US12233286
申请日：2008-09-18
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L29/517 , H01L21/28035 , H01L21/28194 , H01L21/823857 , H01L29/4916 , H01L29/513
摘要： A semiconductor device is disclosed. The device comprises a first MOSFET transistor. The transistor comprises a substrate, a first high-k dielectric layer upon the substrate, a first dielectric capping layer upon the first high-k dielectric, and a first gate electrode made of a semiconductor material of a first doping level and a first conductivity type upon the first dielectric capping layer. The first dielectric capping layer comprises Scandium.
摘要翻译： 公开了一种半导体器件。 该器件包括第一MOSFET晶体管。 晶体管包括衬底，在衬底上的第一高k电介质层，在第一高k电介质上的第一介电覆盖层，以及由第一掺杂水平和第一导电类型的半导体材料制成的第一栅电极 在第一电介质盖层上。 第一介电覆盖层包括钪。
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公开(公告)号：US20050156257A1
公开(公告)日：2005-07-21
申请号：US11066762
申请日：2005-02-28
申请人： Nestor Bojarczuk , Kevin Chan , Christopher D'Emic , Evgeni Gousev , Supratik Guha , Paul Jamison , Lars-Ake Ragnarsson
发明人： Nestor Bojarczuk , Kevin Chan , Christopher D'Emic , Evgeni Gousev , Supratik Guha , Paul Jamison , Lars-Ake Ragnarsson
IPC分类号： H01L21/8238 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/513 , H01L21/28194
摘要： A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over the channel region. The insulating material includes nitrogen (N), and is disposed under the gate electrode. The insulating material can be provided either as a layer or distributed within a gate dielectric material disposed under the gate electrode.
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7.发明申请Method of forming lattice-matched structure on silicon and structure formed thereby 有权在硅上形成晶格匹配结构的方法及由此形成的结构公开(公告)号：US20050095815A1
公开(公告)日：2005-05-05
申请号：US10998840
申请日：2004-11-30
IPC分类号： H01L21/316 , H01L21/30
CPC分类号： H01L21/02192 , B82Y10/00 , B82Y30/00 , H01L21/02293 , H01L21/31604
摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.
摘要翻译： 形成半导体结构的方法（和结果）包括在硅上形成混合的稀土氧化物。 混合的稀土氧化物与硅晶格匹配。
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8.发明申请公开(公告)号：US20100065815A1
公开(公告)日：2010-03-18
申请号：US12620629
申请日：2009-11-18
申请人： Nestor Alexander Bojarczuk, JR. , Douglas Andrew Buchanan , Supratik Guha , Vijay Narayanan , Lars-Ake Ragnarsson
发明人： Nestor Alexander Bojarczuk, JR. , Douglas Andrew Buchanan , Supratik Guha , Vijay Narayanan , Lars-Ake Ragnarsson
CPC分类号： H01L21/02192 , B82Y10/00 , B82Y30/00 , H01L21/02293 , H01L21/31604
摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.
摘要翻译： 形成半导体结构的方法（和结果）包括在硅上形成混合的稀土氧化物。 混合的稀土氧化物与硅晶格匹配。
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9.发明授权公开(公告)号：US07648864B2
公开(公告)日：2010-01-19
申请号：US12197079
申请日：2008-08-22
申请人： Nestor Alexander Bojarczuk, Jr. , Douglas Andrew Buchanan , Supratik Guha , Vijay Narayanan , Lars-Ake Ragnarsson
发明人： Nestor Alexander Bojarczuk, Jr. , Douglas Andrew Buchanan , Supratik Guha , Vijay Narayanan , Lars-Ake Ragnarsson
IPC分类号： H01L21/00 , H01L21/84 , H01L21/336 , H01L21/76 , H01L21/302
CPC分类号： H01L21/02192 , B82Y10/00 , B82Y30/00 , H01L21/02293 , H01L21/31604
摘要： A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.
摘要翻译： 形成半导体结构的方法（和结果）包括在硅上形成混合的稀土氧化物。 混合的稀土氧化物与硅晶格匹配。
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公开(公告)号：US07579285B2
公开(公告)日：2009-08-25
申请号：US11484229
申请日：2006-07-10
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： C23C16/45536 , C23C16/405 , C23C16/482 , C23C16/483 , H01L21/3141
摘要： The invention is related to an ALD method for depositing a layer including the steps of a) providing a semiconductor substrate in a reactor; b) providing a pulse of a first precursor gas into the reactor; c) providing a pulse of a second precursor gas into the reactor; d) providing an inert atmosphere in the reactor; and e) repeating step b) through step d), wherein at least once during step d) the semiconductor substrate is exposed to UV irradiation.
摘要翻译： 本发明涉及一种用于沉积层的ALD方法，包括以下步骤：a）在反应器中提供半导体衬底; b）将第一前体气体的脉冲提供到反应器中; c）向所述反应器提供第二前体气体的脉冲; d）在反应器中提供惰性气氛; 和e）重复步骤b）至步骤d），其中在步骤d）期间至少一次使半导体衬底暴露于UV照射。
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