Tracking thermal mini-cycle stress
    2.
    发明授权
    Tracking thermal mini-cycle stress 失效
    跟踪热微循环应力

    公开(公告)号:US07917328B2

    公开(公告)日:2011-03-29

    申请号:US12194606

    申请日:2008-08-20

    CPC classification number: G06F11/3058

    Abstract: Monitoring temperature excursions an assembly experiences over a life of the assembly is provided. A determination is made as to whether the assembly has been in service beyond a predetermined end of life objective. Responsive to the assembly failing to be in service beyond the predetermined end of life objective, a new temperature value associated with the assembly is read. A modifier value for a figure of merit (FOM) value is computed and added to a cumulative figure of merit value. The cumulative figure of merit value is compared to a cumulative stress figure of merit budget. Responsive to the cumulative figure of merit value exceeding the cumulative stress figure of merit budget, an identified stress management solution is implemented.

    Abstract translation: 提供了组装过程中组装体验的温度偏移。 确定组件是否已经超出预定寿命目标的使用。 响应于组装不能超过预定寿命目标的服务,读取与组件相关联的新的温度值。 计算品质因数(FOM)值的修饰符值,并将其添加到累积品质因数值。 将累积的绩效值与累积压力的绩效预算进行比较。 响应累积绩效值超过累积压力的绩效预算数量,实施了一个确定的压力管理解决方案。

    Electronic package method and structure with cure-melt hierarchy
    6.
    发明授权
    Electronic package method and structure with cure-melt hierarchy 有权
    电子封装方法和结构具有固化熔体层级

    公开(公告)号:US07834442B2

    公开(公告)日:2010-11-16

    申请号:US11954943

    申请日:2007-12-12

    Abstract: Disclosed herein are embodiments of electronic package incorporating a thermal interface material (e.g., a metal TIM) that is positioned between a lid and a chip on a substrate. The TIM has a predetermined (i.e., repeatable) minimum thickness and is further registered to the top surface of the chip (i.e., the TIM has an essentially symmetric shape and does not extend vertically along the sidewalls of the chip). Also, disclosed herein are embodiments of a method of forming such an electronic package that uses a hierarchical heating process that cures a lid sealant, thereby securing the lid to the substrate, and then reflows (i.e., melts and cools) the TIM, thereby adhering the TIM to both the chip and lid. This hierarchical heating process ensures that the TIM has the above-mentioned characteristics (i.e., a predetermined minimum thickness and registration to the top surface of the chip) and further provides robust process windows for high-yield, low-cost electronic package manufacturing.

    Abstract translation: 本文公开了包含位于盖和基板上的芯片之间的热界面材料(例如,金属TIM)的电子封装的实施例。 TIM具有预定的(即可重复的)最小厚度,并进一步与芯片的顶表面对准(即,TIM具有基本上对称的形状,并且不沿芯片的侧壁垂直延伸)。 此外,本文公开了形成这样的电子封装的方法的实施例,其使用固化盖密封剂的分层加热工艺,从而将盖固定到基板上,然后使TIM的回流(即,熔化和冷却),从而粘附 TIM到芯片和盖子。 这种分层加热工艺确保TIM具有上述特性(即,预定的最小厚度并且与芯片的顶表面对准),并且进一步提供用于高产量,低成本电子封装制造的稳健的工艺窗口。

    Implementing loading and heat removal for hub module assembly
    10.
    发明授权
    Implementing loading and heat removal for hub module assembly 失效
    实现轮毂模块组装的加载和除热

    公开(公告)号:US08363404B2

    公开(公告)日:2013-01-29

    申请号:US12967854

    申请日:2010-12-14

    Abstract: A method and apparatus are provided for implementing loading and heat removal for a hub module assembly. The hub module assembly includes a hub chip and a plurality of optical modules attached by land grid array (LGA) assembly disposed on a top surface metallurgy (TSM) LGA residing on a hub ceramic substrate. The ceramic substrate is connected to a circuit board through a bottom surface metallurgy (BSM) LGA assembly. A base alignment ring includes a plurality of alignment features for engaging the circuit board and locating an LGA interposer of the BSM LGA assembly. Each of a pair of top alignment rings includes cooperating alignment features for engaging and locating a respective LGA interposer of respective LGA sites of the TSM LGA assembly. The two LGA interposers of the TSM LGA assembly align, retain, and make the electrical connection between the optical modules and the hub chip.

    Abstract translation: 提供了一种用于实现轮毂模块组件的加载和除热的方法和装置。 集线器模块组件包括集线器芯片和多个光学模块,其通过设置在驻留在轮毂陶瓷衬底上的顶表面冶金(TSM)LGA上的焊盘网阵列(LGA)组件连接。 陶瓷基板通过底表面冶金(BSM)LGA组件连接到电路板。 基座对准环包括用于接合电路板和定位BSM LGA组件的LGA插入器的多个对准特征。 一对顶部对准环中的每一个包括用于接合和定位TSM LGA组件的相应LGA位置的相应LGA插入器的协作对准特征。 TSM LGA组件的两个LGA插入器对齐,保持并使光学模块与集线器芯片之间的电连接。

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