公开(公告)号：US08994082B2

公开(公告)日：2015-03-31

申请号：US13250856

申请日：2011-09-30

Applicant: Feng-Chi Hung ,  Jhy-Jyi Sze ,  Shou-Gwo Wuu

Inventor： Feng-Chi Hung ,  Jhy-Jyi Sze ,  Shou-Gwo Wuu

IPC: H01L31/062 ,  H01L31/113 ,  H01L21/265 ,  H01L29/78 ,  H01L27/146 ,  H01L21/28

CPC classification number: H01L27/14616 ,  H01L21/0223 ,  H01L21/26506 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/28123 ,  H01L21/2822 ,  H01L21/76224 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/1463 ,  H01L29/0653 ,  H01L29/41775 ,  H01L29/42368 ,  H01L29/66568 ,  H01L29/78

Abstract: Transistors, methods of manufacturing thereof, and image sensor circuits with reduced random telegraph signal (RTS) noise are disclosed. In one embodiment, a transistor includes a channel disposed between two isolation regions in a workpiece. The channel has edge regions proximate the isolation regions and a central region between the edge regions. The transistor includes a gate dielectric disposed over the channel, and a gate disposed over the gate dielectric. The transistor includes a voltage threshold modification feature proximate the edge regions configured to increase a voltage threshold of the transistor proximate edge regions relative to the central region of the channel.

Abstract translation: 公开了晶体管，其制造方法和具有减少的随机电报信号（RTS）噪声的图像传感器电路。 在一个实施例中，晶体管包括设置在工件中的两个隔离区域之间的通道。 通道具有靠近隔离区域的边缘区域和边缘区域之间的中心区域。 晶体管包括设置在通道上方的栅极电介质和设置在栅极电介质上的栅极。 晶体管包括靠近边缘区域的电压阈值修改特征，其被配置成相对于通道的中心区域增加晶体管的边缘区域的电压阈值。

公开(公告)号：US07776676B2

公开(公告)日：2010-08-17

申请号：US11954194

申请日：2007-12-11

Applicant: Jhy-Jyi Sze

Inventor： Jhy-Jyi Sze

IPC: H01L21/8238

CPC classification number: H01L27/14643 ,  H01L27/14689

Abstract: A method of fabricating a complementary metal-oxide-semiconductor image sensor is provided. First, a substrate having a photo sensitive region and a transistor device region is provided. A p type well in the substrate of the transistor device region is formed. A dielectric layer and an un-doped polysilicon layer on the substrate are sequentially formed. A n type polysilicon layer on a first portion of the transistor device region and a p type polysilicon layer on the photo sensitive region and on a second portion of the transistor device region are formed. The dielectric layer, the n type polysilicon layer and the p type polysilicon layer are patterned to form a plurality of n type gate structures and a p type gate structure on the p type well of the transistor device region. A photo sensitive diode is formed in the substrate of the photo sensitive region.

Abstract translation: 提供一种制造互补金属氧化物半导体图像传感器的方法。 首先，提供具有光敏区域和晶体管器件区域的衬底。 形成在晶体管器件区域的衬底中的p型阱。 依次形成基板上的介质层和未掺杂多晶硅层。 形成晶体管器件区域的第一部分上的n型多晶硅层和在光敏区域和晶体管器件区域的第二部分上的p型多晶硅层。 图案化电介质层，n型多晶硅层和p型多晶硅层，以在晶体管器件区域的p型阱上形成多个n型栅极结构和p型栅极结构。 光敏二极管形成在感光区的基板中。

公开(公告)号：US20100073528A1

公开(公告)日：2010-03-25

申请号：US12236492

申请日：2008-09-23

Applicant: Yuan-Che Lee ,  Jhy-Jyi Sze ,  Chiao-Fu Chang ,  Tsung-Chien Wu

Inventor： Yuan-Che Lee ,  Jhy-Jyi Sze ,  Chiao-Fu Chang ,  Tsung-Chien Wu

IPC: H04N5/52 ,  H04N5/20

CPC classification number: H04N5/365 ,  H04N5/243

Abstract: A method of generating a gain of an image frame according to a look up table of gain which is set up based on luminance sensitivity of human eyes is proposed. The method includes setting a gain of an image frame to 1, scanning images of a plurality of front rows of the image frame, averaging the images of the plurality of the front rows of the image frame to generate an average value of the images of the plurality of the front rows of the image frame, finding a gain from the look up table of gain according to the average value of the images of the plurality of the front rows of the image frame, and adjusting remaining rows of the image frame according to the gain to generate images of the remaining rows of the image frame.

Abstract translation: 提出了根据基于人眼的亮度灵敏度设置的增益查找表生成图像帧的增益的方法。 该方法包括将图像帧的增益设置为1，扫描图像帧的多个前排的图像，对图像帧的多个前行的图像进行平均，以生成图像的图像的平均值 多个图像帧的前排，根据图像帧的多个前排的图像的平均值，从增益的查找表中找到增益，并根据图像帧的剩余行调整 生成图像帧的剩余行的图像的增益。

公开(公告)号：US20090261393A1

公开(公告)日：2009-10-22

申请号：US12105514

申请日：2008-04-18

Applicant: Jhy-Jyi Sze

Inventor： Jhy-Jyi Sze

IPC: H01L31/00 ,  H01L21/00

CPC classification number: H01L21/823842 ,  H01L21/82345 ,  H01L27/14603 ,  H01L27/14643 ,  H01L27/14689

Abstract: A composite transfer gate is described, which is disposed over a semiconductor substrate between an electron reservoir and a floating node in the semiconductor substrate. The composite transfer gate includes at least one N-type portion and a P-type portion that are arranged laterally.

Abstract translation: 描述了复合传输门，其被布置在半导体衬底中的电子存储器和半导体衬底中的浮动节点之间。 复合传送门包括横向布置的至少一个N型部分和P型部分。

公开(公告)号：US20080113477A1

公开(公告)日：2008-05-15

申请号：US11954194

申请日：2007-12-11

Applicant: Jhy-Jyi Sze

Inventor： Jhy-Jyi Sze

IPC: H01L21/8238

CPC classification number: H01L27/14643 ,  H01L27/14689

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor including a substrate, a p type well, a light emitting diode, a p type gate structure and a plurality of n type gate structures is provided. The substrate has a photo sensitive region and a transistor device region, and the p type well is disposed in the substrate. The light emitting diode is disposed in the p type well and the substrate of the photo sensitive region. The p type gate structure is disposed on the substrate of the transistor device region. The n type gate structures are disposed on the substrate of the transistor device region.

Abstract translation: 提供了包括基板，p型阱，发光二极管，p型栅极结构和多个n型栅极结构的互补金属氧化物半导体（CMOS）图像传感器。 衬底具有光敏区域和晶体管器件区域，p型阱设置在衬底中。 发光二极管设置在p型阱和光敏区的基板中。 p型栅极结构设置在晶体管器件区域的衬底上。 n型栅极结构设置在晶体管器件区域的衬底上。

公开(公告)号：US07371599B2

公开(公告)日：2008-05-13

申请号：US11379053

申请日：2006-04-17

Applicant: Jhy-Jyi Sze

Inventor： Jhy-Jyi Sze

IPC: H01L21/00

CPC classification number: H01L27/14643 ,  H01L27/14632 ,  H01L27/14687 ,  H01L27/14689

Abstract: An image sensor includes a semiconductor substrate, a photo receiving area in the semiconductor substrate, a gate electrode installed in a lateral side of the photo receiving area on the semiconductor substrate, and a patterned dielectric layer covering the gate electrode, the photo receiving area, and exposing a partial gate electrode. A spacer surrounds the gate electrode on the dielectric layer.

Abstract translation: 图像传感器包括半导体衬底，半导体衬底中的光接收区域，安装在半导体衬底上的光接收区域的横向侧的栅极电极以及覆盖栅电极的图案化电介质层，光接收区域， 并露出部分栅电极。 间隔物围绕电介质层上的栅电极。

公开(公告)号：US20060192261A1

公开(公告)日：2006-08-31

申请号：US10906581

申请日：2005-02-25

Applicant: Jhy-Jyi Sze ,  Junbo Chen ,  Ming-Yi Wang

Inventor： Jhy-Jyi Sze ,  Junbo Chen ,  Ming-Yi Wang

IPC: H01L27/14

CPC classification number: H01L27/14603 ,  H01L27/14609 ,  H01L27/14643 ,  H01L27/14689

Abstract: An active pixel sensor is proposed by the invention. The position of the gate of the reset transistor is kept away from the interface of the isolation region and the silicon so that the depletion region does not reach the isolation. Accordingly, dark currents caused by isolation region damages can be avoided.

Abstract translation: 本发明提出一种有源像素传感器。 复位晶体管的栅极的位置远离隔离区域和硅的界面，使得耗尽区域不能达到隔离。 因此，可以避免由隔离区域损坏引起的暗电流。

公开(公告)号：US20050158907A1

公开(公告)日：2005-07-21

申请号：US10893674

申请日：2004-07-15

Applicant: Jhy-Jyi Sze ,  Min-Hua Tsai ,  Tzung-Han Tan ,  Hsin-Ping Wu ,  Chia-Huei Lin

Inventor： Jhy-Jyi Sze ,  Min-Hua Tsai ,  Tzung-Han Tan ,  Hsin-Ping Wu ,  Chia-Huei Lin

IPC: H01L21/00 ,  H01L21/44 ,  H01L21/762 ,  H01L27/146 ,  H01L31/0232

CPC classification number: H01L27/14687 ,  H01L21/76224 ,  H01L27/1463 ,  H01L27/14643

Abstract: A method of fabricating an image sensor device is disclosed. In the method, a substrate having a plurality of trenches therein is provided. A first anti-reflective layer is formed on the surfaces of the trenches. An insulating layer is filled in the trenches for forming a plurality of shallow trench isolation regions. At least one photo sensitive region is formed within the substrate between neighboring shallow trench isolation regions. A second anti-reflective layer is formed at least covering the photo sensitive region. Because the first anti-reflective layer is formed on the surfaces of the trenches, and the second anti-reflective layer is formed on the photo sensitive region, the sensitivity of the image sensor device is improved.

公开(公告)号：US06187629B1

公开(公告)日：2001-02-13

申请号：US09206109

申请日：1998-12-04

Applicant: Jing-Horng Gau ,  Hsiu-Wen Huang ,  Jhy-Jyi Sze

Inventor： Jing-Horng Gau ,  Hsiu-Wen Huang ,  Jhy-Jyi Sze

IPC: H01L218242

CPC classification number: H01L28/84 ,  H01L21/76804 ,  H01L27/10852 ,  H01L28/90

Abstract: A method of fabricating a DRAM capacitor. A conductive layer and an amorphous silicon layer are formed on a substrate having a dielectric layer. The amorphous silicon layer and the conductive layer are etched to form a region of a capacitor to expose a portion of the dielectric layer. An opening with a profile having a wider upper portion and a narrower lower portion is formed within the conductive layer, and through the opening, the dielectric layer is then etched through to form a node contact window to expose the substrate. An amorphous silicon spacer is formed on the sidewall of conductive layer of the region of the capacitor and fills the node contact window. A selective HSG-Si, a dielectric layer and a polysilicon layer are formed to achieve the fabrication of the capacitor. The conductive layer, the amorphous silicon layer and the HSG-Si serve as a lower electrode of the capacitor and the polysilicon layer serves as an upper electrode of the capacitor.

Abstract translation: 一种制造DRAM电容器的方法。 在具有电介质层的基板上形成导电层和非晶硅层。 蚀刻非晶硅层和导电层以形成电容器的区域以暴露电介质层的一部分。 在导电层内形成具有较宽上部和较窄下部的轮廓的开口，然后通过该开口蚀刻通孔以形成节点接触窗以露出衬底。 在电容器区域的导电层的侧壁上形成非晶硅间隔物，并填充节点接触窗口。 形成选择性HSG-Si，电介质层和多晶硅层，以实现电容器的制造。 导电层，非晶硅层和HSG-Si用作电容器的下电极，多晶硅层用作电容器的上电极。

公开(公告)号：US08735937B2

公开(公告)日：2014-05-27

申请号：US13601229

申请日：2012-08-31

Applicant: Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

Inventor： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

IPC: H01L29/66 ,  H01L21/70

CPC classification number: H01L29/66325 ,  H01L21/265 ,  H01L21/304 ,  H01L21/76 ,  H01L21/761 ,  H01L21/76224 ,  H01L29/0696 ,  H01L29/7393 ,  H01L29/7394

Abstract: A device includes a dielectric layer, and a heavily doped semiconductor layer over the dielectric layer. The heavily doped semiconductor layer is of a first conductivity type. A semiconductor region is over the heavily doped semiconductor layer, wherein the semiconductor region is of a second conductivity type opposite the first conductivity type. A Lateral Insulated Gate Bipolar Transistor (LIGBT) is disposed at a surface of the semiconductor region.

Abstract translation: 一种器件包括电介质层和介电层上的重掺杂半导体层。 重掺杂半导体层是第一导电类型。 半导体区域在重掺杂半导体层之上，其中半导体区域是与第一导电类型相反的第二导电类型。 横向绝缘栅双极晶体管（LIGBT）设置在半导体区域的表面。