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公开(公告)号：US09665970B2
公开(公告)日：2017-05-30
申请号：US13368644
申请日：2012-02-08
Applicant: Jason Rupert Redgrave , Steven John Clohset , James Alexander McCombe , Luke Tilman Peterson
Inventor： Jason Rupert Redgrave , Steven John Clohset , James Alexander McCombe , Luke Tilman Peterson
CPC classification number: G06T15/005 , G06F8/4442 , G06F9/30036 , G06F9/4881 , G06F17/30961 , G06F17/5054 , G06T15/06 , G06T2200/16 , G06T2200/28 , G06T2210/52
Abstract: Aspects include, for example, a method for interpreting information in a computer program, or profiling such a program to estimate a group size for instances of that program (program module, or portion thereof). Such a method can be used in a system that supports collecting outputs of executing instances, where those outputs can specify new program instances. Scheduling of new instances (or allocation of resources for executing such instances) can be deferred. A trigger to begin scheduling (or allocation) for a collection of instances uses a target group size for that program. Thus, different programs can have different group sizes, which can be set explicitly, or based on profiling. The profiling can occur during one or more of pre-execution and during execution. The group size estimate can be an input into an algorithm that also accounts for system state during execution.
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公开(公告)号：US07471226B2
公开(公告)日：2008-12-30
申请号：US11452183
申请日：2006-06-13
Applicant: Steven R. Norsworthy , Andrew Tham , Jason Rupert Redgrave , Aubrey Arthur Grey
Inventor： Steven R. Norsworthy , Andrew Tham , Jason Rupert Redgrave , Aubrey Arthur Grey
IPC: H03M1/66
CPC classification number: H03F3/3432 , H03F1/22 , H03F2200/331 , H03M1/0863 , H03M1/742
Abstract: A radio frequency digital-to-analog converter with a programmable current output. In exemplary aspects of the invention, improved apparatus and methods for providing (i) current mirror matching, (ii) enhanced current pulse rising edge performance, (ii) reduced base voltage swing, and (iv) compensated high voltage swing, are provided. The foregoing apparatus and methods can be applied to any RF signal application (wireless or otherwise), including for example wireless cellular handsets.
Abstract translation: 具有可编程电流输出的射频数模转换器。 在本发明的示例性方面，提供了用于提供（i）电流镜匹配，（ii）增强的电流脉冲上升沿性能，（ii）降低的基极电压摆幅和（iv）补偿的高电压摆幅）的改进的装置和方法。 上述装置和方法可以应用于任何RF信号应用（无线或其他），包括例如无线蜂窝手机。
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公开(公告)号：US08744032B2
公开(公告)日：2014-06-03
申请号：US13211054
申请日：2011-08-16
Applicant: Steven R. Norsworthy , Jason Rupert Redgrave
Inventor： Steven R. Norsworthy , Jason Rupert Redgrave
IPC: H04L7/00
CPC classification number: H04L7/0008 , H03H17/0614 , H03H17/0628 , H03H2218/04 , H04L7/0025 , H04L7/005 , H04L7/02
Abstract: Improved interpolator and decimator apparatus and methods, including the addition of an elastic storage element in the signal path. In one exemplary embodiment, the elastic element comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified interpolator and decimator.
Abstract translation: 改进的内插器和抽取器装置和方法，包括在信号路径中添加弹性存储元件。 在一个示例性实施例中，弹性元件包括有利地允许采样时钟的短期变化被吸收的FIFO，并且还提供用于控制基于Δ-Σ调制的模N计数器的采样时钟发生器的反馈机制。 与Δ-Σ调制器和计数器结合的弹性元件产生噪声形式的频率锁定环，而没有额外的组件，导致了非常简化的内插器和抽取器。
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公开(公告)号：US20120133654A1
公开(公告)日：2012-05-31
申请号：US13368644
申请日：2012-02-08
Applicant: Jason Rupert Redgrave , Stephen John Clohset , James Alexander McCombe , Luke Tilman Peterson
Inventor： Jason Rupert Redgrave , Stephen John Clohset , James Alexander McCombe , Luke Tilman Peterson
CPC classification number: G06T15/005 , G06F8/4442 , G06F9/30036 , G06F9/4881 , G06F17/30961 , G06F17/5054 , G06T15/06 , G06T2200/16 , G06T2200/28 , G06T2210/52
Abstract: Aspects include, for example, a method for interpreting information in a computer program, or profiling such a program to estimate a group size for instances of that program (program module, or portion thereof). Such a method can be used in a system that supports collecting outputs of executing instances, where those outputs can specify new program instances. Scheduling of new instances (or allocation of resources for executing such instances) can be deferred. A trigger to begin scheduling (or allocation) for a collection of instances uses a target group size for that program. Thus, different programs can have different group sizes, which can be set explicitly, or based on profiling. The profiling can occur during one or more of pre-execution and during execution. The group size estimate can be an input into an algorithm that also accounts for system state during execution.
Abstract translation: 方面包括例如用于解释计算机程序中的信息的方法，或者对这样的程序进行概要分析以估计该程序（程序模块或其一部分）的实例的组大小。 这种方法可用于支持收集执行实例的输出的系统，其中这些输出可以指定新的程序实例。 可以推迟新实例的调度（或用于执行此类实例的资源分配）。 为一组实例开始调度（或分配）的触发器使用该程序的目标组大小。 因此，不同的程序可以具有不同的组大小，可以明确设置，也可以基于分析。 分析可以在一个或多个预执行期间和执行期间发生。 组大小估计可以是在执行期间也考虑系统状态的算法的输入。
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公开(公告)号：US07561635B2
公开(公告)日：2009-07-14
申请号：US10910941
申请日：2004-08-03
Applicant: Steven R. Norsworthy , Jason Rupert Redgrave
Inventor： Steven R. Norsworthy , Jason Rupert Redgrave
Abstract: A noise-shaping coder with variable or reconfigurable characteristics is disclosed. In one exemplary embodiment, an improved apparatus for signal modulation is disclosed. The apparatus generally comprises a noise-shaping coder having programmable coefficients, programmable coder order, programmable oversampling frequency, and/or programmable dither. In a second exemplary embodiment, an improved method for implementing noise shaping coding is disclosed. The apparatus generally comprises a means for switching from one order coder to another order coder, as well as switching oversampling frequency.
Abstract translation: 公开了具有可变或可重新配置特性的噪声整形编码器。 在一个示例性实施例中，公开了一种用于信号调制的改进装置。 该装置通常包括具有可编程系数，可编程编码器顺序，可编程过采样频率和/或可编程抖动的噪声整形编码器。 在第二示例性实施例中，公开了一种用于实现噪声整形编码的改进方法。 该装置通常包括用于从一个订单编码器切换到另一个订单编码器的装置，以及切换过采样频率。
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Patent Agency Ranking
公开(公告)号：US20110299642A1
公开(公告)日：2011-12-08
申请号：US13211054
申请日：2011-08-16
Applicant: Steven R. Norsworthy , Jason Rupert Redgrave
Inventor： Steven R. Norsworthy , Jason Rupert Redgrave
CPC classification number: H04L7/0008 , H03H17/0614 , H03H17/0628 , H03H2218/04 , H04L7/0025 , H04L7/005 , H04L7/02
Abstract: Improved interpolator and decimator apparatus and methods, including the addition of an elastic storage element in the signal path. In one exemplary embodiment, the elastic element comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified interpolator and decimator.
Abstract translation: 改进的内插器和抽取器装置和方法，包括在信号路径中添加弹性存储元件。 在一个示例性实施例中，弹性元件包括有利地允许采样时钟的短期变化被吸收的FIFO，并且还提供用于控制基于Δ-Σ调制的模N计数器的采样时钟发生器的反馈机制。 与Δ-Σ调制器和计数器结合的弹性元件产生噪声形式的频率锁定环，而没有额外的组件，导致了非常简化的内插器和抽取器。
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公开(公告)号：US20110267347A1
公开(公告)日：2011-11-03
申请号：US13096585
申请日：2011-04-28
Applicant: Stephen Purcell , Christopher Philip Alan Tann , Jason Rupert Redgrave , Cüneyt Özdas
Inventor： Stephen Purcell , Christopher Philip Alan Tann , Jason Rupert Redgrave , Cüneyt Özdas
IPC: G06T15/50
Abstract: Aspects include systems, methods, and media for implementing methods relating to increasing consistency of results during intersection testing. In an example, vertexes define edges of primitives composing a scene (e.g., triangles defining a mesh for a surface of an object in a 3-D scene). An edge can be shared between two primitives. Intersection testing algorithms can use tests involving edges to determine whether or not the ray intersects a primitive defined by those edges. In one approach, a precedence among the vertexes defining a particular edge is enforced for such intersection testing. The precedence causes an intersection tester to always test a given edge in the same orientation, regardless of which primitive defined (at least in part) by that edge is being intersection tested.
Abstract translation: 方面包括系统，方法和媒体，用于实现在交叉测试期间提高结果一致性的方法。 在一个示例中，顶点定义构成场景的图元的边缘（例如，为三维场景中的对象的表面定义网格的三角形）。 一个边可以在两个基元之间共享。 交叉测试算法可以使用涉及边缘的测试来确定光线是否与由这些边缘定义的原语相交。 在一种方法中，为这种交叉点测试强制定义特定边缘的顶点中的优先级。 优先级使交叉测试仪始终以相同的方向测试给定的边缘，而不管该边缘是否被交叉测试定义（至少部分）的原始图案。
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公开(公告)号：US07276966B1
公开(公告)日：2007-10-02
申请号：US10978015
申请日：2004-10-28
Applicant: Andrew Tham , Steven R. Norsworthy , Jason Rupert Redgrave
Inventor： Andrew Tham , Steven R. Norsworthy , Jason Rupert Redgrave
IPC: H03G3/20
CPC classification number: H03G3/3042 , H03F1/0222 , H03F1/0233 , H03F1/32 , H03F1/3211 , H03F1/3294 , H03F3/45183 , H03F2200/102 , H03F2203/45568
Abstract: Improved radio frequency (RF) envelope tracking apparatus for use in wireless and wired systems. In one exemplary embodiment, a transmitter upconversion stage receives input digital I and Q values, the output of the upconversion stage being fed to both an envelope tracking circuit and a power amplifier (before or after optional filtering). The envelope tracking circuit controls the operation of a power modulator, which adjusts the power amplifier. The envelope tracking circuit is specifically configured to provide improved linearity and power efficiency. The envelope tracking apparatus and methods of the present invention may be applied to heterodyne/super-heterodyne architectures as well as others.
Abstract translation: 用于无线和有线系统的改进的射频（RF）包络跟踪装置。 在一个示例性实施例中，发射机上变频级接收输入数字I和Q值，上变频级的输出馈送到包络跟踪电路和功率放大器（在可选滤波之前或之后）。 包络跟踪电路控制调节功率放大器的功率调制器的操作。 包络跟踪电路被特别地配置成提供改进的线性度和功率效率。 本发明的信封跟踪装置和方法可以应用于外差/超外差架构以及其他。
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公开(公告)号：US08692834B2
公开(公告)日：2014-04-08
申请号：US13567091
申请日：2012-08-06
Applicant: Luke Tilman Peterson , James Alexander McCombe , Steven John Clohset , Jason Rupert Redgrave
Inventor： Luke Tilman Peterson , James Alexander McCombe , Steven John Clohset , Jason Rupert Redgrave
CPC classification number: G06T15/005 , G06F9/5033 , G06F9/505 , G06F9/52 , G06F15/8007 , G06T1/20 , G06T1/60 , G06T15/06 , G06T2200/28
Abstract: In some aspects, systems and methods provide for forming groupings of a plurality of independently-specified computation workloads, such as graphics processing workloads, and in a specific example, ray tracing workloads. The workloads include a scheduling key, which is one basis on which the groupings can be formed. Workloads grouped together can all execute from the same source of instructions, one or more different private data elements. Such workloads can recursively instantiate other workloads that reference the same private data elements. In some examples, the scheduling key can be used to identify a data element to be used by all the workloads of a grouping. Memory conflicts to private data elements are handled through scheduling of non-conflicted workloads or specific instructions an deferring conflicted workloads instead of locking memory locations.
Abstract translation: 在一些方面，系统和方法提供用于形成多个独立指定的计算工作负荷（诸如图形处理工作负载）以及在具体示例中的光线跟踪工作负载的分组。 工作负载包括一个调度密钥，这是可以形成分组的一个基础。 分组在一起的工作负载都可以从相同的指令来源执行，一个或多个不同的私有数据元素。 这样的工作负载可以递归地实例化引用相同私有数据元素的其他工作负载。 在一些示例中，调度密钥可用于标识要由分组的所有工作负载使用的数据元素。 与私有数据元素的内存冲突通过调度非冲突的工作负载或特定指令来处理，推迟冲突的工作负载而不是锁定内存位置。
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公开(公告)号：US08019035B2
公开(公告)日：2011-09-13
申请号：US10910910
申请日：2004-08-03
Applicant: Steven R. Norsworthy , Jason Rupert Redgrave
Inventor： Steven R. Norsworthy , Jason Rupert Redgrave
CPC classification number: H04L7/0008 , H03H17/0614 , H03H17/0628 , H03H2218/04 , H04L7/0025 , H04L7/005 , H04L7/02
Abstract: Improved interpolator and decimator apparatus and methods, including the addition of an elastic storage element in the signal path. In one exemplary embodiment, the elastic element comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified interpolator and decimator.
Abstract translation: 改进的内插器和抽取器装置和方法，包括在信号路径中添加弹性存储元件。 在一个示例性实施例中，弹性元件包括有利地允许采样时钟的短期变化被吸收的FIFO，并且还提供用于控制基于Δ-Σ调制的模N计数器的采样时钟发生器的反馈机制。 与Δ-Σ调制器和计数器结合的弹性元件产生噪声形式的频率锁定环，而没有额外的组件，导致了非常简化的内插器和抽取器。
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