公开(公告)号：US20080130822A1

公开(公告)日：2008-06-05

申请号：US11772833

申请日：2007-07-03

Applicant: Chun-Yuan Hsu ,  Jan-Ruei Lin ,  Hsiang-Yun Wei ,  Che-Cheng Kuo ,  Chun-Yao Huang

Inventor： Chun-Yuan Hsu ,  Jan-Ruei Lin ,  Hsiang-Yun Wei ,  Che-Cheng Kuo ,  Chun-Yao Huang

IPC: G11C19/28

CPC classification number: G11C19/28

Abstract: A shift register, a driving circuit and a display device using the same are disclosed. The shift register includes a 1st and a 2nd rectifying elements and 1st˜4th transistors. 1st source/drains of the 1st˜3rd transistors receive a common voltage respectively. The gates of the 1st and 3rd transistors and a 2nd source/drain of the 2nd transistor are coupled to a 2nd terminal of the 2nd rectifying element. The gates of the 2nd and 4th transistors and a 2nd source/drain of the 1st transistor are coupled to a 2nd terminal of the 1st rectifying element. A 1st source/drain of the 4th transistor is coupled to a 2nd source/drain of the 3rd transistor. The 1st terminals of the 1st and 2nd rectifying elements respectively receive input signals and a 1st clock signal. A 2nd source/drain of the 4th transistor receives a 2nd clock signal.

Abstract translation: 公开了一种移位寄存器，驱动电路和使用该移位寄存器的显示装置。 移位寄存器包括一个第一和第二个整流元件和一个第一至第四个第三晶体管。 1 〜3 晶体管的1 / SUP源极/漏极分别接收公共电压。 第一晶体管和第三晶体管的栅极和第二晶体管的第二和/或第二源极/漏极 耦合到第2和/或（SUP）整流元件的第2端子。 第二晶体管的第二和第四和第四晶体管的栅极和第一晶体管的第二和/或第二源极/漏极 耦合到第1级校正元件的2端子端子。 第四晶体管的源极/漏极的第一个源极/漏极耦合到第三晶体管的第二源极/漏极， SUP>晶体管。 第一和第二和/或第二整流元件的第一端子分别接收输入信号和第一时钟 信号。 第4个晶体管的源极/漏极的第2个/第2个源极/漏极接收第二个时钟信号。

公开(公告)号：US20070153562A1

公开(公告)日：2007-07-05

申请号：US11308146

申请日：2006-03-08

Applicant: Wei-Jen Chang ,  Shyh-Shyuan Sheu ,  Jan-Ruei Lin

Inventor： Wei-Jen Chang ,  Shyh-Shyuan Sheu ,  Jan-Ruei Lin

IPC: H01L29/08 ,  H01L35/24 ,  G11C11/00 ,  G11C13/00 ,  H01L51/00

CPC classification number: G11C13/00 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0028 ,  G11C2213/79

Abstract: A bit cell of an organic memory is provided. The bit cell of the organic memory comprises an organic memory cell, a first transistor, a current mirror and a second transistor. To connect the organic memory cell to a data line, the first transistor is activated for reading and the second transistor is activated for writing. Furthermore, the first transistor has a greater size than the second transistor. Therefore, a fast processing time in writing and a large conduction current in reading are catered for. In addition, the current mirror amplifies the conduction current in reading and increases the capacity for resisting the interference by adjacent bit cell.

Abstract translation: 提供有机存储器的位单元。 有机存储器的位单元包括有机存储单元，第一晶体管，电流镜和第二晶体管。 为了将有机存储单元连接到数据线，第一晶体管被激活用于读取，第二晶体管被激活用于写入。 此外，第一晶体管具有比第二晶体管更大的尺寸。 因此，在写入时的快速处理时间和读取中的大的传导电流被满足。 此外，电流镜放大读取中的导通电流，并增加抵抗相邻位单元的干扰的能力。

公开(公告)号：US07068251B2

公开(公告)日：2006-06-27

申请号：US10632911

申请日：2003-08-04

Applicant: Jan-Ruei Lin ,  Bowen Wang ,  Shang-Li Chen

Inventor： Jan-Ruei Lin ,  Bowen Wang ,  Shang-Li Chen

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2300/0857 ,  G09G2340/0428

Abstract: A Pixel Circuit For Liquid Crystal Display Using Static Memory is disclosed, wherein a digital circuit is installed at a pixel of the liquid crystal display (LCD) for processing static image. The digital circuit works with an analog circuit for processing dynamic image. Several multiplexers and static memory are provided to enhance the digital and analog signal processing, for lowering the power consumption so as to accomplish power saving function of a Pixel Circuit For Liquid Crystal Display Using Static Memory.

Abstract translation: 公开了使用静态存储器的液晶显示器的像素电路，其中数字电路安装在用于处理静态图像的液晶显示器（LCD）的像素处。 数字电路与模拟电路一起工作，用于处理动态图像。 提供了多路复用器和静态存储器来增强数字和模拟信号处理，降低功耗，从而实现使用静态存储器的液晶显示器像素电路的功耗。

公开(公告)号：US20060055687A1

公开(公告)日：2006-03-16

申请号：US11056173

申请日：2005-02-14

Applicant: Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Ming-Daw Chen ,  Jan-Ruei Lin

Inventor： Shyh-Shyuan Sheu ,  Lieh-Chiu Lin ,  Ming-Daw Chen ,  Jan-Ruei Lin

IPC: G09G5/00

CPC classification number: G09G3/2014 ,  G09G2310/027 ,  H03M1/84

Abstract: Brightness control circuits and drivers and display devices using the same. In the brightness control circuit, a current digital-to-analog converter (DAC) receives a digital code and generates a control current, and an one-shot circuit is coupled to the current DAC to generate a pulse width modulated (PWM) signal according to the control current and a clock signal. The digital code and pulse width modulated signal have an exponential relationship.

Abstract translation: 亮度控制电路和驱动器及使用其的显示装置。 在亮度控制电路中，电流数模转换器（DAC）接收数字代码并产生控制电流，并且单触发电路耦合到电流DAC以产生脉宽调制（PWM）信号，根据 到控制电流和时钟信号。 数字码和脉宽调制信号具有指数关系。

公开(公告)号：US20050104836A1

公开(公告)日：2005-05-19

申请号：US10865311

申请日：2004-06-10

Applicant: Jan-Ruei Lin ,  Chang-Ho Liou ,  Chang-Cheng Lin ,  Yu-Lin Lee

Inventor： Jan-Ruei Lin ,  Chang-Ho Liou ,  Chang-Cheng Lin ,  Yu-Lin Lee

IPC: G11C19/00 ,  G09G3/20 ,  G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G11C19/00 ,  G11C19/28

Abstract: A shift-register circuit. The shift-register circuit has a plurality of shift-register units connected in series. Each of the shift-register units generates first and second pulse signals, wherein the first pulse signal is an output signal of the shift-register circuit and the second pulse signal is a trigger signal of a subsequent shift-register unit. A LCD panel driving circuit using the shift-register circuit is also disclosed.

Abstract translation: 移位寄存器电路。 移位寄存器电路具有串联连接的多个移位寄存器单元。 每个移位寄存器单元产生第一和第二脉冲信号，其中第一脉冲信号是移位寄存器电路的输出信号，第二脉冲信号是随后的移位寄存器单元的触发信号。 还公开了使用移位寄存器电路的LCD面板驱动电路。

公开(公告)号：US20080106504A1

公开(公告)日：2008-05-08

申请号：US11754309

申请日：2007-05-27

Applicant: Hsiang-Yun Wei ,  Chun-Yuan Hsu ,  Che-Cheng Kuo ,  Chun-Yao Huang ,  Jan-Ruei Lin

Inventor： Hsiang-Yun Wei ,  Chun-Yuan Hsu ,  Che-Cheng Kuo ,  Chun-Yao Huang ,  Jan-Ruei Lin

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G2320/0233

Abstract: The present invention discloses an OLED driving device, including a first switch transistor, a first transistor, a second switch transistor, a storage capacitor and a second transistor. The first switch transistor is used to receive a data signal, and output the data signal by the control of a first scan signal. The first transistor is used to compensate the effect of the threshold voltage of the second transistor. The second switch transistor is used to receive a voltage signal, and output the voltage signal by the control of a second scan signal. The storage capacitor is used to store a data voltage. The second transistor is electrically connected to the second switch transistor through the storage capacitor. The present invention can efficiently release the charges from the storage capacitor, enhance display effect, and change the input voltage level for adapting different operating voltages of integrate circuits.

Abstract translation: 本发明公开了一种OLED驱动装置，包括第一开关晶体管，第一晶体管，第二开关晶体管，存储电容器和第二晶体管。 第一开关晶体管用于接收数据信号，并通过第一扫描信号的控制来输出数据信号。 第一晶体管用于补偿第二晶体管的阈值电压的影响。 第二开关晶体管用于接收电压信号，并且通过控制第二扫描信号来输出电压信号。 存储电容用于存储数据电压。 第二晶体管通过存储电容器电连接到第二开关晶体管。 本发明可以有效地从存储电容器中释放电荷，增强显示效果，并且改变输入电压电平以适应集成电路的不同工作电压。

公开(公告)号：US20070109841A1

公开(公告)日：2007-05-17

申请号：US11347052

申请日：2006-02-03

Applicant: Chih-Sheng Lin ,  Chia-Pao Chang ,  Jan-Ruei Lin

Inventor： Chih-Sheng Lin ,  Chia-Pao Chang ,  Jan-Ruei Lin

IPC: G11C11/00

CPC classification number: G11C7/067 ,  G11C7/062 ,  G11C7/14

Abstract: A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first switch and coupled to the reference input terminal through a second switch, a second sub-array coupled to the cell input terminal through a third switch and coupled to the reference input terminal through a fourth switch, and a reference cell array coupled between the second switch and the fourth switch and coupled to the reference input terminal.

Abstract translation: 提供存储器件。 该器件包括具有单元输入端和参考输入端的读出放大器，通过第一开关耦合到单元输入端并通过第二开关耦合到参考输入端的第一子阵列，第二子阵列耦合 通过第三开关耦合到单元输入端，并通过第四开关耦合到参考输入端，以及耦合在第二开关和第四开关之间并耦合到参考输入端的参考单元阵列。

公开(公告)号：US20060243974A1

公开(公告)日：2006-11-02

申请号：US11175440

申请日：2005-07-07

Applicant: Keng-Li Su ,  Chen-Pang Kung ,  Jan-Ruei Lin ,  Chia-Pao Chang ,  Yi-Hsun Huang

Inventor： Keng-Li Su ,  Chen-Pang Kung ,  Jan-Ruei Lin ,  Chia-Pao Chang ,  Yi-Hsun Huang

IPC: H01L29/04

CPC classification number: H01L29/78603 ,  H01L27/1296 ,  H01L29/41733

Abstract: A thin-film transistor (TFT) is described to have a gate layer, an insulating layer, a semiconductor layer, and a source/drain layer formed on a flexible substrate. The source and the drain layers are separated by a channel with a special shape. This does not only increase the aspect ratio of the channel per unit area, the source and the drain also have multiple directions for transmitting carriers. The carrier mobility of the TFT is thus enhanced with uniform and stable circuit properties.

Abstract translation: 薄膜晶体管（TFT）被描述为具有形成在柔性基板上的栅极层，绝缘层，半导体层和源极/漏极层。 源极和漏极层由具有特殊形状的通道分开。 这不仅增加了每单位面积通道的纵横比，而且源和漏还具有用于传输载体的多个方向。 因此，TFT的载流子迁移率增强，具有均匀且稳定的电路特性。

公开(公告)号：US20050057553A1

公开(公告)日：2005-03-17

申请号：US10760410

申请日：2004-01-21

Applicant: Jun-Ren Shih ,  Chia-Pao Chang ,  Bowen Wang ,  Jan-Ruei Lin

Inventor： Jun-Ren Shih ,  Chia-Pao Chang ,  Bowen Wang ,  Jan-Ruei Lin

IPC: G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  G09G5/00 ,  H03K19/0185

CPC classification number: G09G3/3677 ,  G09G3/2096 ,  G09G2310/0267 ,  G09G2310/0289 ,  G09G2330/021

Abstract: Scan driver and driving system with low input voltage and their level shift circuit are disclosed. The scan driver includes a latch unit, a level shift circuit and a buffer. The latch unit generates a first control signal and a second control signal. The level shift circuit is connected to the latch unit to receive the first control signal, the second control signal, a first clock signal and a second clock signal, so as to output a scan signal with high voltage level. The buffer enhances driving ability of the scan signal for driving thin-film transistors (TFTs) of a display panel.

Abstract translation: 公开了具有低输入电压的扫描驱动器和驱动系统及其电平移位电路。 扫描驱动器包括锁存单元，电平移位电路和缓冲器。 锁存单元产生第一控制信号和第二控制信号。 电平移位电路连接到锁存单元以接收第一控制信号，第二控制信号，第一时钟信号和第二时钟信号，以输出具有高电压电平的扫描信号。 该缓冲器增强用于驱动显示面板的薄膜晶体管（TFT）的扫描信号的驱动能力。

公开(公告)号：US07447292B2

公开(公告)日：2008-11-04

申请号：US11772833

申请日：2007-07-03

Applicant: Chun-Yuan Hsu ,  Jan-Ruei Lin ,  Hsiang-Yun Wei ,  Che-Cheng Kuo ,  Chun-Yao Huang

Inventor： Chun-Yuan Hsu ,  Jan-Ruei Lin ,  Hsiang-Yun Wei ,  Che-Cheng Kuo ,  Chun-Yao Huang

IPC: G11C19/00

CPC classification number: G11C19/28

Abstract: A shift register, a driving circuit and a display device using the same are disclosed. The shift register includes a 1st and a 2nd rectifying elements and 1st˜4th transistors. 1st source/drains of the 1st˜3rd transistors receive a common voltage respectively. The gates of the 1st and 3rd transistors and a 2nd source/drain of the 2nd transistor are coupled to a 2nd terminal of the 2nd rectifying element. The gates of the 2nd and 4th transistors and a 2nd source/drain of the 1st transistor are coupled to a 2nd terminal of the 1st rectifying element. A 1st source/drain of the 4th transistor is coupled to a 2nd source/drain of the 3rd transistor. The 1st terminals of the 1st and 2nd rectifying elements respectively receive input signals and a 1st clock signal. A 2nd source/drain of the 4th transistor receives a 2nd clock signal.

Abstract translation: 公开了一种移位寄存器，驱动电路和使用该移位寄存器的显示装置。 移位寄存器包括一个第一和第二个整流元件和一个第一至第四个第三晶体管。 1 〜3 晶体管的1 / SUP源极/漏极分别接收公共电压。 第一晶体管和第三晶体管的栅极和第二晶体管的第二和/或第二源极/漏极 耦合到第2和/或（SUP）整流元件的第2端子。 第二晶体管的第二和第四和第四晶体管的栅极和第一晶体管的第二和/或第二源极/漏极 耦合到第1级校正元件的2端子端子。 第四晶体管的源极/漏极的第一个源极/漏极耦合到第三晶体管的第二源极/漏极， SUP>晶体管。 第一和第二和/或第二整流元件的第一端子分别接收输入信号和第一时钟 信号。 第4 晶体管的源极/漏极的第2个源极/漏极接收第2个时钟信号。