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    TRENCH FORMING METHOD AND STRUCTURE
    2.
    发明申请
    TRENCH FORMING METHOD AND STRUCTURE 失效
    TRENCH形成方法和结构

    公开(公告)号：US20100164075A1

    公开(公告)日：2010-07-01

    申请号：US12344733

    申请日：2008-12-29

    申请人： Alan Bernard Botula ,  Michael Lawrence Gautsch ,  Alvin Jose Joseph ,  Max Gerald Levy ,  James Albert Slinkman

    发明人： Alan Bernard Botula ,  Michael Lawrence Gautsch ,  Alvin Jose Joseph ,  Max Gerald Levy ,  James Albert Slinkman

    IPC分类号： H01L23/58 ,  H01L21/467

    CPC分类号： H01L21/76283

    摘要： An electrical structure and method of forming. The method includes providing a semiconductor structure comprising a semiconductor substrate, a buried oxide layer (BOX) formed over the semiconductor substrate, and a silicon on insulator layer (SOI) formed over and in contact with the BOX layer. The SOI layer comprises shallow trench isolation (STI) structures formed between electrical devices. A first photoresist layer is formed over the STI structures and the electrical devices. Portions of said first photoresist layer, portions of the STI structures, and portions of the BOX layer are removed resulting in formed trenches. Ion implants are formed within portions of the semiconductor substrate. Remaining portions of the first photoresist layer are removed. A dielectric layer is formed over the electrical devices and within the trenches. A second photoresist layer is formed over the dielectric layer. Portions of the second photoresist layer are removed.

    摘要翻译： 一种电气结构和成型方法。 该方法包括提供半导体结构，其包括半导体衬底，形成在半导体衬底上的掩埋氧化物层（BOX）以及在BOX层上形成并与BOX层接触的绝缘体上硅层。 SOI层包括在电气装置之间形成的浅沟槽隔离（STI）结构。 在STI结构和电气装置上形成第一光致抗蚀剂层。 所述第一光致抗蚀剂层的部分，STI结构的部分和BOX层的部分被去除，导致形成的沟槽。 离子植入物形成在半导体衬底的部分内。 去除第一光致抗蚀剂层的剩余部分。 电介质层形成在电气装置上并在沟槽内。 在电介质层上形成第二光致抗蚀剂层。 去除第二光致抗蚀剂层的部分。

    SCALING OF BIPOLAR TRANSISTORS
    5.
    发明申请
    SCALING OF BIPOLAR TRANSISTORS 有权
    双极晶体管的放大

    公开(公告)号：US20110278570A1

    公开(公告)日：2011-11-17

    申请号：US13195155

    申请日：2011-08-01

    申请人： Alvin Jose Joseph ,  Ramana Murty Malladi ,  James Albert Slinkman

    发明人： Alvin Jose Joseph ,  Ramana Murty Malladi ,  James Albert Slinkman

    IPC分类号： H01L29/732 ,  H01L21/331

    CPC分类号： H01L29/66272 ,  G06F17/5009 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/12 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76232 ,  H01L21/8249 ,  H01L27/0207 ,  H01L29/7322 ,  Y02P90/265

    摘要： Bipolar transistor structures, methods of designing and fabricating bipolar transistors, methods of designing circuits having bipolar transistors. The method of designing the bipolar transistor includes: selecting an initial design of a bipolar transistor; scaling the initial design of the bipolar transistor to generate a scaled design of the bipolar transistor; determining if stress compensation of the scaled design of the bipolar transistor is required based on dimensions of an emitter of the bipolar transistor after the scaling; and if stress compensation of the scaled design of the bipolar transistor is required then adjusting a layout of a trench isolation layout level of the scaled design relative to a layout of an emitter layout level of the scaled design to generate a stress compensated scaled design of the bipolar transistor.

    摘要翻译： 双极晶体管结构，双极晶体管的设计和制造方法，设计具有双极晶体管的电路的方法。 设计双极晶体管的方法包括：选择双极晶体管的初始设计; 缩放双极晶体管的初始设计以产生双极晶体管的缩放设计; 基于缩放之后双极晶体管的发射极的尺寸来确定双极晶体管的缩放设计的应力补偿是否需要; 并且如果需要对双极型晶体管的缩放设计的应力补偿，则调整缩放设计的沟槽隔离布局级别相对于缩放设计的发射器布局级别的布局的布局，以产生压缩补偿的缩放设计 双极晶体管。

    Scaling of bipolar transistors
    6.
    发明授权
    Scaling of bipolar transistors 有权
    双极晶体管的缩放

    公开(公告)号：US08020128B2

    公开(公告)日：2011-09-13

    申请号：US12493383

    申请日：2009-06-29

    申请人： Alvin Jose Joseph ,  Ramana Murty Malladi ,  James Albert Slinkman

    发明人： Alvin Jose Joseph ,  Ramana Murty Malladi ,  James Albert Slinkman

    IPC分类号： G06F17/50 ,  G06F9/455

    CPC分类号： H01L29/66272 ,  G06F17/5009 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/12 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76232 ,  H01L21/8249 ,  H01L27/0207 ,  H01L29/7322 ,  Y02P90/265

    摘要： Bipolar transistor structures, methods of designing and fabricating bipolar transistors, methods of designing circuits having bipolar transistors. The method of designing the bipolar transistor includes: selecting an initial design of a bipolar transistor; scaling the initial design of the bipolar transistor to generate a scaled design of the bipolar transistor; determining if stress compensation of the scaled design of the bipolar transistor is required based on dimensions of an emitter of the bipolar transistor after the scaling; and if stress compensation of the scaled design of the bipolar transistor is required then adjusting a layout of a trench isolation layout level of the scaled design relative to a layout of an emitter layout level of the scaled design to generate a stress compensated scaled design of the bipolar transistor.

    摘要翻译： 双极晶体管结构，双极晶体管的设计和制造方法，设计具有双极晶体管的电路的方法。 设计双极晶体管的方法包括：选择双极晶体管的初始设计; 缩放双极晶体管的初始设计以产生双极晶体管的缩放设计; 基于缩放之后双极晶体管的发射极的尺寸来确定双极晶体管的缩放设计的应力补偿是否需要; 并且如果需要对双极型晶体管的缩放设计的应力补偿，则调整缩放设计的沟槽隔离布局级别相对于缩放设计的发射器布局级别的布局的布局，以产生压缩补偿的缩放设计 双极晶体管。