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    Enclosure device of wireless communication apparatus
    4.
    发明授权
    Enclosure device of wireless communication apparatus 有权
    无线通信装置的外壳装置

    公开(公告)号：US08004844B2

    公开(公告)日：2011-08-23

    申请号：US12402593

    申请日：2009-03-12

    Applicant: Duk-Yong Kim ,  Jung-Pil Lee ,  Kyoung-Seuk Kim ,  Chang-Woo Yoo ,  Sung-Ho Jang

    Inventor： Duk-Yong Kim ,  Jung-Pil Lee ,  Kyoung-Seuk Kim ,  Chang-Woo Yoo ,  Sung-Ho Jang

    IPC: H05K7/20

    CPC classification number: H05K7/20409 ,  H05K7/20163

    Abstract: An enclosure device of a wireless communication apparatus, which has a tubular structure with increased heat dissipation not unknown heretofore. A section of the enclosure device has a polygonal or circular shape, such as a substantially cylindrical structure, and the enclosure, which has a plurality of radiation fins arranged on an outer surface of the enclosure in a vertical direction, is formed integrally with the radiation fins by using a compression method. Various communication devices of the wire communication apparatus are mounted on the interior of the enclosure. The structure is preferably formed by the radiation fins and exhibits an increased radiation effect than that of a structure where radiation fins are arranged side by side on a flat plane.

    Abstract translation: 一种无线通信装置的封闭装置，其具有以往未知的具有增加的热耗散的管状结构。 封闭装置的一部分具有多边形或圆形形状，例如基本上圆柱形的结构，并且具有沿垂直方向布置在外壳的外表面上的多个辐射翅片的外壳与辐射一体地形成 翅片采用压缩法。 有线通信装置的各种通信装置安装在外壳的内部。 该结构优选地由辐射翅片形成，并且与在平面上并排布置散热片的结构相比表现出增加的辐射效果。

    Memory card and method of updating memory card program
    5.
    发明授权
    Memory card and method of updating memory card program 有权
    存储卡和更新存储卡程序的方法

    公开(公告)号：US08407684B2

    公开(公告)日：2013-03-26

    申请号：US11565257

    申请日：2006-11-30

    Applicant: Jung-pil Lee

    Inventor： Jung-pil Lee

    IPC: G06F9/44 ,  G06F9/445

    CPC classification number: G06F13/4239

    Abstract: A memory card includes a bus a central processing unit (CPU) connected to the bus, a volatile memory connected to the bus, a nonvolatile memory, and a host interface. The host interface receives a first command signal from a host and outputs a reset signal for resetting the CPU, receives an update application program from the host and outputs it to the volatile memory, receives a second command signal from the host and outputs a reset release signal for releasing a reset state of the CPU, and receives an update program from the host and outputs it to the nonvolatile memory. The CPU executes the update application program stored in the volatile memory to output the update program to the nonvolatile memory in response to the reset release signal.

    Abstract translation: 存储卡包括总线，连接到总线的中央处理单元（CPU），连接到总线的易失性存储器，非易失性存储器和主机接口。 主机接口接收来自主机的第一命令信号并输出​​用于复位CPU的复位信号，从主机接收更新应用程序并将其输出到易失性存储器，从主机接收第二命令信号并输出​​复位释放 用于释放CPU的复位状态的信号，并从主机接收更新程序并将其输出到非易失性存储器。 CPU执行存储在易失性存储器中的更新应用程序，以便根据复位释放信号将更新程序输出到非易失性存储器。

    Switchable combiner/divider with multiple inputs/outputs
    6.
    发明授权
    Switchable combiner/divider with multiple inputs/outputs 失效
    具有多个输入/输出的可切换组合器/分配器

    公开(公告)号：US07936236B2

    公开(公告)日：2011-05-03

    申请号：US12442039

    申请日：2006-12-07

    Applicant: Taek-Dong Kim ,  Duk-Yong Kim ,  Jung-Pil Lee ,  Sang-Sig Park ,  Jin-Chul Hwang ,  Nam-Shin Park

    Inventor： Taek-Dong Kim ,  Duk-Yong Kim ,  Jung-Pil Lee ,  Sang-Sig Park ,  Jin-Chul Hwang ,  Nam-Shin Park

    IPC: H01P1/10 ,  H01P5/12

    CPC classification number: H01P1/10 ,  H01P5/04

    Abstract: A switchable combiner/divider with multiple inputs/outputs is provided. The switchable combiner/divider with multiple inputs/outputs includes multiple input ports for receiving multiple incoming signals, multiple output ports, a switching part for alternately connecting the multiple input ports to output ports as a circulating configuration, and a controller for providing switching control signals to the switching part.

    Abstract translation: 提供具有多个输入/输出的可切换组合器/分配器。 具有多个输入/输出的可切换组合器/分配器包括用于接收多个输入信号的多个输入端口，多个输出端口，用于将多个输入端口交替连接到输出端口作为循环配置的开关部件，以及用于提供开关控制信号的控制器 到切换部分。

    Switchable Combiner/Divider With Multiple Inputs/Outputs
    7.
    发明申请
    Switchable Combiner/Divider With Multiple Inputs/Outputs 失效
    具有多个输入/输出的可切换组合器/分频器

    公开(公告)号：US20100019860A1

    公开(公告)日：2010-01-28

    申请号：US12442039

    申请日：2006-12-07

    Applicant: Taek-Dong Kim ,  Duk-Yong Kim ,  Jung-Pil Lee ,  Sang-Sig Park ,  Jin-Chul Hwang ,  Nam-Shin Park

    Inventor： Taek-Dong Kim ,  Duk-Yong Kim ,  Jung-Pil Lee ,  Sang-Sig Park ,  Jin-Chul Hwang ,  Nam-Shin Park

    IPC: H01P1/10

    CPC classification number: H01P1/10 ,  H01P5/04

    Abstract: A switchable combiner/divider with multiple inputs/outputs is provided. The switchable combiner/divider with multiple inputs/outputs includes multiple input ports for receiving multiple incoming signals, multiple output ports, a switching part for alternately connecting the multiple input ports to output ports as a circulating configuration, and a controller for providing switching control signals to the switching part.

    Abstract translation: 提供具有多个输入/输出的可切换组合器/分配器。 具有多个输入/输出的可切换组合器/分配器包括用于接收多个输入信号的多个输入端口，多个输出端口，用于将多个输入端口交替连接到输出端口作为循环配置的开关部件，以及用于提供开关控制信号的控制器 到切换部分。

    Memory cards, nonvolatile memories and methods for copy-back operations thereof
    8.
    发明申请
    Memory cards, nonvolatile memories and methods for copy-back operations thereof 审中-公开
    存储卡，非易失性存储器及其复制操作的方法

    公开(公告)号：US20070170268A1

    公开(公告)日：2007-07-26

    申请号：US11637368

    申请日：2006-12-12

    Applicant: Jung-Pil Lee

    Inventor： Jung-Pil Lee

    IPC: G06K19/06

    CPC classification number: G06F11/1068 ,  G11C16/102

    Abstract: Memory cards are provided including a memory controller and a nonvolatile memory. The nonvolatile memory is configured to perform a copy-back operation responsive to an instruction from the memory controller. The nonvolatile memory includes a cell array, a page buffer and a data comparator. The cell array includes a plurality of pages. The page buffer is configured to read data from a source page of the plurality of pages and the source page is selected by the memory controller. The data comparator is configured to determine whether a reading failure occurred during a read operation. The memory controller is configured to correct the reading failure of the read data of the page buffer and transfer the corrected data to the page buffer if it is determined that a reading failure has occurred. Related nonvolatile memories and copy-back operations are also provided herein.

    Abstract translation: 提供存储卡，包括存储器控制器和非易失性存储器。 非易失性存储器被配置为响应于来自存储器控制器的指令执行复制操作。 非易失性存储器包括单元阵列，页缓冲器和数据比较器。 单元阵列包括多个页面。 页面缓冲器被配置为从多个页面的源页面读取数据，并且存储器控制器选择源页面。 数据比较器被配置为确定在读取操作期间是否发生读取失败。 存储器控制器被配置为如果确定已经发生读取失败，则校正页面缓冲器的读取数据的读取失败并将校正的数据传送到页面缓冲器。 本文还提供了相关的非易失性存储器和复制操作。

    MEMORY SWAPPING METHOD, AND HOST DEVICE, STORAGE DEVICE, AND DATA PROCESSING SYSTEM USING THE SAME
    10.
    发明申请
    MEMORY SWAPPING METHOD, AND HOST DEVICE, STORAGE DEVICE, AND DATA PROCESSING SYSTEM USING THE SAME 有权
    存储器切换方法和主机设备，存储设备和使用该存储器的数据处理系统

    公开(公告)号：US20150331628A1

    公开(公告)日：2015-11-19

    申请号：US14685619

    申请日：2015-04-14

    Applicant: JUNG-PIL LEE ,  HWA-SEOK OH ,  KYUNG-PHIL YOO ,  MYUNG-SUB SHIN

    Inventor： JUNG-PIL LEE ,  HWA-SEOK OH ,  KYUNG-PHIL YOO ,  MYUNG-SUB SHIN

    IPC: G06F3/06

    CPC classification number: G06F13/16 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0688 ,  G06F9/3004 ,  G06F9/54 ,  G06F12/02 ,  G06F12/1009

    Abstract: A memory swapping method and a data processing system using the same, the memory swapping method including receiving queue information for a memory swapping task from a host device; performing part of the memory swapping task in a storage device based on the queue information; receiving a command corresponding to the queue information from the host device after performing of the part of the memory swapping task is completed; and performing a remaining part of the memory swapping task according to the command by using a result of the part of the memory swapping task that had been previously performed.

    Abstract translation: 一种存储器交换方法和使用其的数据处理系统，所述存储器交换方法包括从主机设备接收用于存储器交换任务的队列信息; 基于队列信息在存储设备中执行部分内存交换任务; 在执行部分存储器交换任务之后，从主机装置接收与该队列信息对应的命令完成; 以及通过使用先前执行的部分内存交换任务的结果，根据该命令执行存储器交换任务的剩余部分。

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