公开(公告)号：US20150243637A1

公开(公告)日：2015-08-27

申请号：US14709840

申请日：2015-05-12

申请人： Pil-Kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Jumyong Park ,  Jinho Park ,  Kyu-Ha Lee ,  Deok-Young Jung ,  Gilheyun Choi

发明人： Pil-Kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Jumyong Park ,  Jinho Park ,  Kyu-Ha Lee ,  Deok-Young Jung ,  Gilheyun Choi

IPC分类号： H01L25/065 ,  G11C8/00 ,  G11C16/08 ,  H01L23/544

摘要： A conductive via of a semiconductor device is provided extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate. An insulating layer is provided on the first end of the conductive via and on the first surface of the substrate. An upper portion of a mask layer pattern is removed so that a capping portion of the insulating layer that is on the first end of the conductive via is exposed. A portion of the insulating layer at a side of, and spaced apart from, the conductive via, is removed, to form a recess in the insulating layer. The capping portion of the insulating layer on the first end of the conductive via is simultaneously removed.

摘要翻译： 提供半导体器件的导电通孔，其沿垂直方向穿过衬底延伸，导电通孔的第一端延伸穿过衬底的第一表面，使得第一端相对于衬底的第一表面在垂直方向上突出 底物。 绝缘层设置在导电通孔的第一端和基板的第一表面上。 除去掩模层图案的上部，使得在导电通孔的第一端上的绝缘层的封盖部分露出。 去除绝缘层的与导电通孔相隔一定距离的一部分，以在绝缘层中形成凹陷。 同时去除导电通孔第一端上的绝缘层的封盖部分。

公开(公告)号：US08963336B2

公开(公告)日：2015-02-24

申请号：US14333509

申请日：2014-07-16

申请人： Deok-young Jung ,  Pil-kyu Kang ,  Byung-lyul Park ,  Ji-soon Park ,  Seong-min Son ,  Jin-ho An ,  Ji-hwang Kim

发明人： Deok-young Jung ,  Pil-kyu Kang ,  Byung-lyul Park ,  Ji-soon Park ,  Seong-min Son ,  Jin-ho An ,  Ji-hwang Kim

IPC分类号： H01L29/40 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/561 ,  H01L21/568 ,  H01L23/291 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83005 ,  H01L2224/83102 ,  H01L2224/9202 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/16145 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.

摘要翻译： 半导体器件包括：基板，包括彼此相对的第一表面和第二表面;延伸穿过基板的通孔电极。 通孔电极具有互连金属层和围绕互连金属层的侧表面的阻挡金属层。 通孔电极的一端在第二表面上方突出。 间隔绝缘层可以设置在通孔电极的外侧壁上。 通孔电极焊盘连接到通孔电极并且在基本平行于第二表面的间隔绝缘层上延伸。 在第二表面上层叠第一氧化硅层和氮化硅层。 第一氧化硅层的厚度大于氮化硅层的厚度。

公开(公告)号：US08697583B2

公开(公告)日：2014-04-15

申请号：US13224737

申请日：2011-09-02

申请人： Kyung-seok Oh ,  Kyung-mun Byun ,  Shin-hye Kim ,  Deok-young Jung ,  Gil-heyun Choi ,  Eunkee Hong

发明人： Kyung-seok Oh ,  Kyung-mun Byun ,  Shin-hye Kim ,  Deok-young Jung ,  Gil-heyun Choi ,  Eunkee Hong

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/76224

摘要： Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.

摘要翻译： 根据本发明的实施方案提供的是氧化促进组合物，形成氧化物层的方法和制造半导体器件的方法。 在本发明的一些实施方案中，氧化促进组合物包括具有AML结构的氧化促进剂，其中L是化学吸附在硅表面，氧化硅，氮化硅或金属上的官能团，A是 一种可热分解的氧化官能团，M是允许A和L彼此共价结合的部分。

公开(公告)号：US08546256B2

公开(公告)日：2013-10-01

申请号：US13167225

申请日：2011-06-23

申请人： Deok-young Jung ,  Gil-heyun Choi ,  Suk-chul Bang ,  Byung-lyul Park ,  Kwang-jin Moon ,  Dong-chan Lim

发明人： Deok-young Jung ,  Gil-heyun Choi ,  Suk-chul Bang ,  Byung-lyul Park ,  Kwang-jin Moon ,  Dong-chan Lim

IPC分类号： H01L21/283

CPC分类号： H01L21/76802 ,  H01L21/02057 ,  H01L21/30655 ,  H01L21/76898

摘要： The methods include forming a semiconductor substrate pattern by etching a semiconductor substrate. The semiconductor pattern has a first via hole that exposes side walls of the semiconductor substrate pattern, and the side walls of the semiconductor substrate pattern exposed by the first via hole have an impurity layer pattern. The methods further include treating upper surfaces of the semiconductor substrate pattern, the treated upper surfaces of the semiconductor substrate pattern being hydrophobic; removing the impurity layer pattern from the side walls of the semiconductor substrate pattern exposed by the first via hole; forming a first insulating layer pattern on the side walls of the semiconductor substrate pattern exposed by the first via hole; and filling a first conductive layer pattern into the first via hole and over the first insulating layer pattern.

摘要翻译： 所述方法包括通过蚀刻半导体衬底形成半导体衬底图案。 半导体图案具有暴露半导体衬底图案的侧壁的第一通孔，并且由第一通孔露出的半导体衬底图案的侧壁具有杂质层图案。 所述方法还包括处理半导体衬底图案的上表面，所处理的半导体衬底图案的上表面是疏水的; 从由第一通孔露出的半导体衬底图案的侧壁去除杂质层图案; 在由第一通孔露出的半导体衬底图案的侧壁上形成第一绝缘层图案; 以及将第一导电层图案填充到第一通孔中并在第一绝缘层图案之上。

公开(公告)号：US20120058647A1

公开(公告)日：2012-03-08

申请号：US13224737

申请日：2011-09-02

申请人： Kyung-seok Oh ,  Kyung-mun Byun ,  Shin-hye Kim ,  Deok-young Jung ,  Gil-heyun Choi ,  Eunkee Hong

发明人： Kyung-seok Oh ,  Kyung-mun Byun ,  Shin-hye Kim ,  Deok-young Jung ,  Gil-heyun Choi ,  Eunkee Hong

IPC分类号： H01L21/316

CPC分类号： H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/76224

摘要： Provided according to embodiments of the present invention are an oxidation-promoting compositions, methods of forming oxide layers, and methods of fabricating semiconductor devices. In some embodiments of the invention, the oxidation-promoting composition includes an oxidation-promoting agent having a structure of A-M-L, wherein L is a functional group that is chemisorbed to a surface of silicon, silicon oxide, silicon nitride, or metal, A is a thermally decomposable oxidizing functional group, and M is a moiety that allows A and L to be covalently bonded to each other.

摘要翻译： 根据本发明的实施方案提供的是氧化促进组合物，形成氧化物层的方法和制造半导体器件的方法。 在本发明的一些实施方案中，氧化促进组合物包括具有AML结构的氧化促进剂，其中L是化学吸附在硅表面，氧化硅，氮化硅或金属上的官能团，A是 一种可热分解的氧化官能团，M是允许A和L彼此共价结合的部分。

公开(公告)号：US20120039564A1

公开(公告)日：2012-02-16

申请号：US13191874

申请日：2011-07-27

申请人： Pil-Kyu Kang ,  GilHeyun Choi ,  Sukchul Bang ,  Daelok Bae ,  Byung-Lyul Park ,  KwangJin Moon ,  Dong-Chan Lim ,  Deok-Young Jung

发明人： Pil-Kyu Kang ,  GilHeyun Choi ,  Sukchul Bang ,  Daelok Bae ,  Byung-Lyul Park ,  KwangJin Moon ,  Dong-Chan Lim ,  Deok-Young Jung

IPC分类号： G02B6/12

CPC分类号： G02B6/131 ,  G02B6/132 ,  G02B6/136 ,  G02B2006/12061

摘要： A photoelectric integrated circuit device may include a substrate including an electronic device region and an on die optical input/output device region, the substrate having a trench in the on die optical input/output device region; a lower clad layer provided in the trench, the lower clad layer having an upper surface lower than a surface of the substrate; a core provided on the lower clad layer; an insulating pattern provided on the core; an optical detection pattern provided on the insulating pattern, the optical detection pattern having at least a portion provided in the trench; and at least one transistor provided on the substrate of the electronic device region.

摘要翻译： 光电集成电路器件可以包括包括电子器件区域和裸片上的光输入/输出器件区域的衬底，所述衬底在管芯光输入/输出器件区域中具有沟槽; 设置在所述沟槽中的下包层，所述下包层具有比所述基板的表面低的上表面; 设置在下包层上的芯; 设置在芯上的绝缘图案; 设置在所述绝缘图案上的光学检测图案，所述光学检测图案具有设置在所述沟槽中的至少一部分; 以及设置在电子器件区域的衬底上的至少一个晶体管。

公开(公告)号：US20110318923A1

公开(公告)日：2011-12-29

申请号：US12913753

申请日：2010-10-27

申请人： Byung-Lyul Park ,  Gil-Heyun Choi ,  Suk-Chul Bang ,  Kwang-Jin Moon ,  Dong-Chan Lim ,  Deok-Young Jung

发明人： Byung-Lyul Park ,  Gil-Heyun Choi ,  Suk-Chul Bang ,  Kwang-Jin Moon ,  Dong-Chan Lim ,  Deok-Young Jung

IPC分类号： H01L21/768

CPC分类号： H01L21/76898 ,  H01L21/76801 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541

摘要： For forming a semiconductor device, a via structure is formed through at least one dielectric layer and at least a portion of a substrate. In addition, a protective buffer layer is formed onto the via structure. Furthermore, a conductive structure for an integrated circuit is formed over the substrate after forming the via structure and the protective buffer layer, with the conductive structure not being formed over the via structure. Thus, deterioration of the conductive and via structures is minimized.

摘要翻译： 为了形成半导体器件，通过至少一个电介质层和至少一部分衬底形成通孔结构。 此外，在通孔结构上形成保护缓冲层。 此外，在形成通孔结构和保护缓冲层之后，在衬底上形成用于集成电路的导电结构，其中导电结构不在过孔结构上形成。 因此，导电和通孔结构的劣化被最小化。

公开(公告)号：US07129463B2

公开(公告)日：2006-10-31

申请号：US10968535

申请日：2004-10-19

申请人： Deok-Young Jung

发明人： Deok-Young Jung

IPC分类号： H03F3/08

CPC分类号： H01L31/02019 ,  H03F3/082

摘要： A photocurrent sensing circuit having a stabilized feedback loop comprises a photocurrent generator including a photodiode generating the photocurrent in proportion to an amount of incident light and applying the photocurrent to an output node, a switching unit applying the photocurrent applied to a control node to a voltage-generating capacitor when a shutter signal is in a first state, and applying a predetermined current to the control node when the shutter signal is in a second state, and a circuit stabilizer applying the photocurrent applied to the output node to the control node, and always forming a feedback loop of the photodiode through the photocurrent applied to the output node, wherein the circuit stabilizer comprises a first NMOS transistor forming the feedback loop of the photodiode in response to the photocurrent input to the output node when the predetermined current is applied to the control node, breaking the feedback loop and applying the photocurrent applied to the output node to the control node when the predetermined current is not applied to the control node, a second NMOS transistor always forming the feedback loop of the photodiode in response to the photocurrent applied to the output node, and a third NMOS transistor connected to the first and second transistors and the photodiode, and providing a current path for forming the feedback loop.

摘要翻译： 具有稳定的反馈回路的光电流检测电路包括光电流发生器，其包括光电二极管，其产生与入射光量成比例的光电流并将光电流施加到输出节点;开关单元，将施加到控制节点的光电流施加到电压 当快门信号处于第一状态时，产生电容器，并且当快门信号处于第二状态时将预定电流施加到控制节点;以及电路稳压器，将施加到输出节点的光电流施加到控制节点，以及 总是通过施加到输出节点的光电流形成光电二极管的反馈回路，其中电路稳压器包括第一NMOS晶体管，当预定电流被施加到第一NMOS晶体管时，该第一NMOS晶体管响应于光电流输入到输出节点，形成光电二极管的反馈回路 控制节点，断开反馈回路并施加光电流 当所述预定电流不被施加到所述控制节点时，输出节点到所述控制节点;响应于施加到所述输出节点的光电流总是形成所述光电二极管的反馈回路的第二NMOS晶体管，以及连接到所述第一NMOS晶体管的第三NMOS晶体管 以及第二晶体管和光电二极管，并提供用于形成反馈回路的电流路径。

公开(公告)号：US20060007181A1

公开(公告)日：2006-01-12

申请号：US11145332

申请日：2005-06-03

申请人： Deok-Young Jung ,  Jae-Surk Hong ,  Young-Ho Shin

发明人： Deok-Young Jung ,  Jae-Surk Hong ,  Young-Ho Shin

IPC分类号： G09G5/00

CPC分类号： G06F3/0383 ,  G06F3/03543 ,  G06F3/03547 ,  G06F2203/0339

摘要： An electrical touch sensor is provided. The electrical touch sensor includes: a touch detection part having at least one touch pad and generating a first signal having a same delay time regardless of whether the object is in contact with the touch pad and a second signal having a varied delay time according to whether the object is in contact with the touch pad; and a contact signal generator generating a contact signal in response to the delay time-difference between the first and second signals. Therefore, it is possible to increase operation reliability by precisely determining whether the object is in contact with the pad, when the object has charge accumulation characteristics more than a certain level, although its conductive is insufficient. In addition, the electrical touch sensor can determine whether the object is in contact with the pad using only one pad to reduce a layout area of a product.

公开(公告)号：US20140327150A1

公开(公告)日：2014-11-06

申请号：US14333509

申请日：2014-07-16

申请人： Deok-young JUNG ,  Pil-kyu KANG ,  Byung-lyul PARK ,  Ji-soon PARK ,  Seong-min SON ,  Jin-ho AN ,  Ji-hwang KIM

发明人： Deok-young JUNG ,  Pil-kyu KANG ,  Byung-lyul PARK ,  Ji-soon PARK ,  Seong-min SON ,  Jin-ho AN ,  Ji-hwang KIM

IPC分类号： H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/561 ,  H01L21/568 ,  H01L23/291 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83005 ,  H01L2224/83102 ,  H01L2224/9202 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/16145 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor device includes a substrate including a first surface and a second surface opposite to each other, a through-via electrode extending through the substrate. The through-via electrode has an interconnection metal layer and a barrier metal layer surrounding a side surface of the interconnection metal layer. One end of the through-via electrode protrudes above the second surface. A spacer insulating layer may be provided on an outer sidewall of the through-via electrode. A through-via electrode pad is connected to the through-via electrode and extends on the spacer insulating layer substantially parallel to the second surface. A first silicon oxide layer and a silicon nitride layer are stacked on the second surface. A thickness of the first silicon oxide layer is greater than a thickness of the silicon nitride layer.

摘要翻译： 半导体器件包括：基板，包括彼此相对的第一表面和第二表面;延伸穿过基板的通孔电极。 通孔电极具有互连金属层和围绕互连金属层的侧表面的阻挡金属层。 通孔电极的一端在第二表面上方突出。 间隔绝缘层可以设置在通孔电极的外侧壁上。 通孔电极焊盘连接到通孔电极并且在基本平行于第二表面的间隔绝缘层上延伸。 在第二表面上层叠第一氧化硅层和氮化硅层。 第一氧化硅层的厚度大于氮化硅层的厚度。