公开(公告)号：US20130320537A1

公开(公告)日：2013-12-05

申请号：US13483074

申请日：2012-05-30

Applicant: Jia-Jia Chen ,  Chi-Mao Hsu ,  Tsun-Min Cheng ,  Chun-Ling Lin ,  Huei-Ru Tsai ,  Ching-Wei Hsu ,  Chin-Fu Lin ,  Hsin-Yu Chen

Inventor： Jia-Jia Chen ,  Chi-Mao Hsu ,  Tsun-Min Cheng ,  Chun-Ling Lin ,  Huei-Ru Tsai ,  Ching-Wei Hsu ,  Chin-Fu Lin ,  Hsin-Yu Chen

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76847 ,  H01L21/76898 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.

Abstract translation: 硅通孔结构位于衬底的凹槽中。 贯通硅通孔结构包括阻挡层，缓冲层和导电层。 阻挡层覆盖凹部的表面。 缓冲层覆盖阻挡层。 导电层位于缓冲层上并填充凹槽，其中导电层和缓冲层之间的接触表面比缓冲层和阻挡层之间的接触表面更平滑。 此外，还提供了形成所述贯穿硅通孔结构的通硅通孔工艺。

公开(公告)号：US08481425B2

公开(公告)日：2013-07-09

申请号：US13108969

申请日：2011-05-16

Applicant: Yen-Liang Lu ,  Chun-Ling Lin ,  Chi-Mao Hsu ,  Chin-Fu Lin ,  Chun-Hung Chen ,  Tsun-Min Cheng ,  Meng-Hong Tsai

Inventor： Yen-Liang Lu ,  Chun-Ling Lin ,  Chi-Mao Hsu ,  Chin-Fu Lin ,  Chun-Hung Chen ,  Tsun-Min Cheng ,  Meng-Hong Tsai

IPC: H01L21/44

CPC classification number: H01L21/76898 ,  H01L21/76828 ,  H01L21/76831

Abstract: A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.

Abstract translation: 公开了一种制造硅通孔结构的方法。 该方法包括以下步骤：提供半导体衬底; 在半导体衬底中形成穿硅通孔; 覆盖穿通硅通孔内的衬垫; 在衬垫上进行烘烤过程; 在衬垫上形成阻挡层; 以及在所述贯通硅通孔中形成贯通硅通孔电极。

公开(公告)号：US07796348B2

公开(公告)日：2010-09-14

申请号：US12061888

申请日：2008-04-03

Applicant: Chun-Ling Lin

Inventor： Chun-Ling Lin

IPC: G02B9/64 ,  G02B13/04

CPC classification number: G02B13/06

Abstract: A wide angle lens module includes a first lens and a second lens with negative refracting power, a third lens and a fourth lens with positive refracting power, a fifth lens with negative refracting power, a sixth lens with positive refracting power, and a seventh lens with negative refracting power. The first lens, the second lens, the third lens, the fourth lens, the fifth lens, the sixth lens, and the seventh lens are disposed in order from an object side to an image side.

Abstract translation: 广角镜头模块包括具有负折射力的第一透镜和第二透镜，具有正折射力的第三透镜和第四透镜，具有负折射力的第五透镜，具有正折射率的第六透镜和第七透镜 具有负折射力。 第一透镜，第二透镜，第三透镜​​，第四透镜，第五透镜，第六透镜和第七透镜从物体侧到像侧依次布置。

公开(公告)号：US07742243B2

公开(公告)日：2010-06-22

申请号：US11952974

申请日：2007-12-07

Applicant: Chun-Ling Lin

Inventor： Chun-Ling Lin

IPC: G02B9/04

CPC classification number: G02B13/16 ,  G02B9/64

Abstract: An exemplary projection lens includes, in this order from the magnification side to the minification side thereof, a negative lens group of negative fraction power, and a positive lens group of positive fraction power. The projection lens satisfies the formulas of: −2.5

Abstract translation: 示例性的投影透镜从其放大倍率到细化侧依次包括负分数倍的负透镜组和正分光焦度的正透镜组。 投影透镜满足以下公式：-2.5

公开(公告)号：US07701650B2

公开(公告)日：2010-04-20

申请号：US12108021

申请日：2008-04-23

Applicant: Chun-Ling Lin

Inventor： Chun-Ling Lin

IPC: G02B9/04 ,  G02B9/64 ,  A61B1/06

CPC classification number: A61B1/04 ,  A61B1/00096 ,  A61B1/041 ,  G02B9/64 ,  G02B13/04 ,  G02B23/243 ,  H04N2005/2255

Abstract: A wide-angle lens module includes a first lens and a second lens with negative refracting power, a third lens with positive refracting power, a fourth lens with negative refracting power, a fifth lens with positive refracting power, a sixth lens with positive refracting power, and a seventh lens with negative refracting power. The first lens, the second lens, the third lens, the fourth lens, the fifth lens, the sixth lens, and the seventh lens are disposed in order from an object side to an image side.

Abstract translation: 广角镜头模块包括第一透镜和具有负折射力的第二透镜，具有正折射力的第三透镜，具有负折射力的第四透镜，具有正折射力的第五透镜，具有正折射力的第六透镜 和具有负折射力的第七透镜。 第一透镜，第二透镜，第三透镜​​，第四透镜，第五透镜，第六透镜和第七透镜从物体侧到像侧依次布置。

公开(公告)号：US20090052057A1

公开(公告)日：2009-02-26

申请号：US12061888

申请日：2008-04-03

Applicant: CHUN-LING LIN

Inventor： CHUN-LING LIN

IPC: G02B13/04

CPC classification number: G02B13/06

Abstract: A wide angle lens module includes a first lens and a second lens with negative refracting power, a third lens and a fourth lens with positive refracting power, a fifth lens with negative refracting power, a sixth lens with positive refracting power, and a seventh lens with negative refracting power. The first lens, the second lens, the third lens, the fourth lens, the fifth lens, the sixth lens, and the seventh lens are disposed in order from an object side to an image side.

Abstract translation: 广角镜头模块包括具有负折射力的第一透镜和第二透镜，具有正折射力的第三透镜和第四透镜，具有负折射力的第五透镜，具有正折射率的第六透镜和第七透镜 具有负折射力。 第一透镜，第二透镜，第三透镜​​，第四透镜，第五透镜，第六透镜和第七透镜从物体侧到像侧依次布置。

公开(公告)号：US07408723B1

公开(公告)日：2008-08-05

申请号：US11946311

申请日：2007-11-28

Applicant: Chun-Ling Lin

Inventor： Chun-Ling Lin

IPC: G02B13/18 ,  G02B9/34

CPC classification number: G02B13/0055 ,  G02B9/34 ,  G02B13/004

Abstract: An exemplary imaging lens includes, in this order from the object side to the image side thereof, a first lens of positive refraction power, a second lens of negative refraction power, a third lens of positive refraction power, and a fourth lens of negative refraction power. The imaging lens satisfies the formulas of: (1) 1 15 and (3) R7>0, R6

Abstract translation: 示例性成像透镜从物体侧到其像侧依次包括正折射率的第一透镜，负折射光焦度的第二透镜，正折射率的第三透镜和负折射的第四透镜 功率。 成像透镜满足以下公式：（1）1 15和（3）R7> 0，R6 <0，其中T是成像透镜的总长度，F是成像透镜的有效焦距，R3是曲率半径 第二透镜的物体侧表面R6是第三透镜的像侧表面的曲率半径，R7是第四透镜的物体侧表面的曲率半径。

公开(公告)号：US09136170B2

公开(公告)日：2015-09-15

申请号：US13483074

申请日：2012-05-30

Applicant: Jia-Jia Chen ,  Chi-Mao Hsu ,  Tsun-Min Cheng ,  Chun-Ling Lin ,  Huei-Ru Tsai ,  Ching-Wei Hsu ,  Chin-Fu Lin ,  Hsin-Yu Chen

Inventor： Jia-Jia Chen ,  Chi-Mao Hsu ,  Tsun-Min Cheng ,  Chun-Ling Lin ,  Huei-Ru Tsai ,  Ching-Wei Hsu ,  Chin-Fu Lin ,  Hsin-Yu Chen

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76847 ,  H01L21/76898 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.

Abstract translation: 硅通孔结构位于衬底的凹槽中。 贯通硅通孔结构包括阻挡层，缓冲层和导电层。 阻挡层覆盖凹部的表面。 缓冲层覆盖阻挡层。 导电层位于缓冲层上并填充凹槽，其中导电层和缓冲层之间的接触表面比缓冲层和阻挡层之间的接触表面更平滑。 此外，还提供了形成所述贯穿硅通孔结构的通硅通孔工艺。

公开(公告)号：US08551876B2

公开(公告)日：2013-10-08

申请号：US13212187

申请日：2011-08-18

Applicant: Yu-Ren Wang ,  Te-Lin Sun ,  Szu-Hao Lai ,  Po-Chun Chen ,  Chih-Hsun Lin ,  Che-Nan Tsai ,  Chun-Ling Lin ,  Chiu-Hsien Yeh

Inventor： Yu-Ren Wang ,  Te-Lin Sun ,  Szu-Hao Lai ,  Po-Chun Chen ,  Chih-Hsun Lin ,  Che-Nan Tsai ,  Chun-Ling Lin ,  Chiu-Hsien Yeh

IPC: H01L21/28

CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7848

Abstract: A manufacturing method for a semiconductor device having a metal gate includes providing a substrate having at least a first semiconductor device formed thereon, forming a first gate trench in the first semiconductor device, forming a first work function metal layer in the first gate trench, and performing a decoupled plasma oxidation to the first work function metal layer.

Abstract translation: 具有金属栅极的半导体器件的制造方法包括提供至少形成有第一半导体器件的衬底，在第一半导体器件中形成第一栅极沟槽，在第一栅极沟槽中形成第一功函数金属层，以及 对第一功函数金属层进行解耦等离子体氧化。

公开(公告)号：US20130178063A1

公开(公告)日：2013-07-11

申请号：US13347758

申请日：2012-01-11

Applicant: Chun-Ling Lin ,  Chi-Mao Hsu ,  Tsun-Min Cheng ,  Jia-Jia Chen ,  Chin-Fu Lin

Inventor： Chun-Ling Lin ,  Chi-Mao Hsu ,  Tsun-Min Cheng ,  Jia-Jia Chen ,  Chin-Fu Lin

IPC: H01L21/28

CPC classification number: H01L21/76898

Abstract: A method of manufacturing semiconductor device having silicon through via is disclosed, and conductor can be fully filled in the silicon through via. First, a silicon substrate is provided. Then, the silicon substrate is etched to form a through silicon via (TSV), and the through silicon via extends down from a surface of the silicon substrate. Next, a barrier layer is formed on the silicon substrate and in the through silicon via. Then, a seed layer is formed on the barrier layer and in the through silicon via. Afterward, a wet treatment is performed on the seed layer over the silicon substrate and within the through silicon via. The through silicon via is then filled with a conductor.

Abstract translation: 公开了一种制造具有硅通孔的半导体器件的方法，并且导体可以通过通孔完全填充到硅中。 首先，提供硅基板。 然后，蚀刻硅衬底以形成贯穿硅通孔（TSV），并且通硅通孔从硅衬底的表面向下延伸。 接下来，在硅衬底和贯穿硅通孔中形成阻挡层。 然后，在阻挡层和贯穿硅通孔中形成种子层。 之后，在硅衬底上以及在硅通孔内的种子层上进行湿处理。 然后通过硅通孔填充导体。