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    INDIVIDUAL GRATING FABRICATION AND ASSEMBLY
    2.
    发明申请
    INDIVIDUAL GRATING FABRICATION AND ASSEMBLY 有权

    公开(公告)号：US20250067937A1

    公开(公告)日：2025-02-27

    申请号：US18812575

    申请日：2024-08-22

    Applicant: Applied Materials, Inc.

    Inventor： Michael Alexander WEINSTEIN ,  Rutger MEYER TIMMERMAN THIJSSEN

    IPC: F21V8/00 ,  G02B27/01

    Abstract: The present disclosure generally provides waveguide combiners and methods thereof. The waveguide combiners include a substrate. A first grating is disposed over the substrate. The first grating includes a first device structure. A first coating layer is disposed over the first device structure. A first donor substrate is disposed over the first coating layer. A second grating is disposed over the substrate. The second grating includes a second device structure. A second coating layer is disposed over the second device structure. A second donor substrate is disposed over the second coating layer. An encapsulation layer is disposed over the first grating and the second grating.

    STORAGE NODE CONTACT (SNC) JUNCTION FORMATION FOR THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY (DRAM)
    5.
    发明申请
    STORAGE NODE CONTACT (SNC) JUNCTION FORMATION FOR THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY (DRAM) 有权

    公开(公告)号：US20250063716A1

    公开(公告)日：2025-02-20

    申请号：US18781132

    申请日：2024-07-23

    Applicant: Applied Materials, Inc.

    Inventor： Zhijun CHEN ,  Fredrick FISHBURN

    IPC: H10B12/00

    Abstract: Examples herein relate to three-dimensional (3D) dynamic random access memory (DRAM) and corresponding methods. In an example, a stacked semiconductor structure is provided, where the stacked semiconductor structure includes a plurality of unit stacks formed on a substrate. Each unit stack has a semiconductor layer, a first dielectric layer, a first gate electrode, and a second dielectric layer of a capacitor portion. A lateral recess of the capacitor portion is open to a first opening through the unit stack. The method includes conformally depositing, in the lateral recess, a doped silicon layer on a lateral end of the semiconductor layer, performing a thermal annealing process after forming the doped silicon layer on the second lateral end. The method further includes forming a capacitor where the lateral recess was disposed, the capacitor contacting the doped silicon layer on the second lateral end of the semiconductor layer.

    Methods and apparatus for cooling a substrate support
    7.
    发明授权
    Methods and apparatus for cooling a substrate support 有权

    公开(公告)号：US12232299B2

    公开(公告)日：2025-02-18

    申请号：US17964668

    申请日：2022-10-12

    Applicant: Applied Materials, Inc.

    Inventor： Robert Irwin Decottignies ,  Roger Bradford Fish ,  Steven Szudarski ,  Shane Lawrence Kintner

    IPC: H05K7/20 ,  H01L21/67

    Abstract: Methods and apparatus for processing a substrate are provided herein. For example, an apparatus for processing a substrate comprises a process chamber configured to process a substrate, a substrate support comprising a heat sink configured to cool the substrate support during operation and a water trap panel comprising a pumping ring configured to cool the water trap panel such that the water trap panel condenses water vapor molecules and drops a process chamber pressure during operation, and a chiller operably coupled to the substrate support and configured to supply a cooling fluid to the substrate support via a cooling fluid line that connects to the heat sink and the pumping ring via a serial configuration or a parallel configuration.

    Processing chamber with multiple plasma units
    8.
    发明授权
    Processing chamber with multiple plasma units 有权

    公开(公告)号：US12230479B2

    公开(公告)日：2025-02-18

    申请号：US18599767

    申请日：2024-03-08

    Applicant: Applied Materials, Inc.

    Inventor： Kazuya Daito ,  Yi Xu ,  Yu Lei ,  Takashi Kuratomi ,  Jallepally Ravi ,  Pingyan Lei ,  Dien-Yeh Wu

    IPC: C23C16/50 ,  C23C16/455 ,  H01J37/32 ,  H01L21/67 ,  H05H1/46

    Abstract: Provided is a processing chamber configured to contain a semiconductor substrate in a processing region of the chamber. The processing chamber includes a remote plasma unit and a direct plasma unit, wherein one of the remote plasma unit or the direct plasma unit generates a remote plasma and the other of the remote plasma unit or the direct plasma unit generates a direct plasma. The combination of a remote plasma unit and a direct plasma unit is used to remove, etch, clean, or treat residue on a substrate from previous processing and/or from native oxide formation. The combination of a remote plasma unit and direct plasma unit is used to deposit thin films on a substrate.

    Eco-efficiency monitoring and exploration platform for semiconductor manufacturing
    9.
    发明授权
    Eco-efficiency monitoring and exploration platform for semiconductor manufacturing 有权

    公开(公告)号：US12228905B2

    公开(公告)日：2025-02-18

    申请号：US17548334

    申请日：2021-12-10

    Applicant: Applied Materials, Inc.

    Inventor： Ala Moradian ,  Umesh Madhav Kelkar ,  Elizabeth Neville ,  Orlando Trejo ,  Sergey Meirovich ,  Kartik B. Shah ,  Shreyas Suresh Kher

    IPC: G05B19/18 ,  G05B19/406

    Abstract: Technologies directed to an eco-efficiency monitoring and exploration platform for semiconductor manufacturing. One method includes receiving, by a processing device, first data indicating an update to a substrate fabrication system having a first configuration of manufacturing equipment and operating to one or more process procedures. The method further includes determining, by the processing device, using the first data with a digital replica, environmental resource data. The digital replica includes a digital reproduction of the substrate fabrication system. The environmental resource usage data indicates an environment resource consumption that corresponds to performing the one or more process procedures by the substrate fabrication system incorporating the update. The method further includes providing, by the processing device, the environmental resource usage data for display on a graphical user interface (GUI).

    Level monitoring and active adjustment of a substrate support assembly
    10.
    发明授权
    Level monitoring and active adjustment of a substrate support assembly 有权

    公开(公告)号：US12227847B2

    公开(公告)日：2025-02-18

    申请号：US17218882

    申请日：2021-03-31

    Applicant: Applied Materials, Inc.

    Inventor： James V. Santiago ,  Patricia M. Liu

    IPC: C23C16/52 ,  C23C16/458 ,  H01L21/67 ,  H01L21/68 ,  H01L21/687

    Abstract: Embodiments of the present disclosure generally relate to an apparatus and method of processing a substrate. In at least one embodiment, an apparatus includes a chamber body, a substrate support assembly and a bracket assembly disposed outside the chamber body and coupled to the substrate support assembly. The bracket assembly has a plurality of leveling screws for adjusting a level of the substrate support assembly. The apparatus includes an actuator coupled to one of the plurality of leveling screws and an accelerometer coupled to the substrate support assembly. The accelerometer is configured to indicate an orientation of the substrate support assembly. The apparatus includes a control module in communication with the actuator and the accelerometer. The control module is configured to determine the level of the substrate support assembly based on the orientation indicated by the accelerometer and adjust the level of the substrate support assembly using the actuator.

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